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CYIL1SN3000-EVAL PDF预览

CYIL1SN3000-EVAL

更新时间: 2024-11-24 06:51:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 传感器
页数 文件大小 规格书
2页 448K
描述
High Speed Imag e Sensor

CYIL1SN3000-EVAL 数据手册

 浏览型号CYIL1SN3000-EVAL的Datasheet PDF文件第2页 
CYPRESS  
LUPA 3000  
485 FPS,13.3 Gbit  
HiGH SPeed imAGe SenSor  
PRODUCT OVERVIEW  
FEATURES  
DESCRIPTION  
•ꢀ1696 x 1710 active pixels  
•ꢀ8 μm x 8 μm square pixels  
•ꢀ1 inch optical format  
The LUPA 3000 is a high speed CMOS image sensor with an image resolution of  
1696 x 1710 pixels. The pixels are 8 μm x 8 μm in size and consist of high sensitivity 6T  
pipelined snapshot shutter capability, where integration during readout is possible. The  
LUPA 3000 delivers 8-bit color or monochrome digital images with a 3 MPixel resolution  
at 485 fps which makes this product ideal for high speed vision machine, intelligent traffic  
system, and holographic data storage. The LUPA 3000 captures complex high speed events  
for traditional machine vision applications and various high speed imaging applications.  
•ꢀMono and color with micro lens  
•ꢀ485 fps frame rate  
•ꢀ64 on-chip 8-bit ADCs  
•ꢀ32 LVDS serial outputs  
•ꢀRandom programmable ROI readout  
•ꢀPipelined and Triggered snapshot shutter  
•ꢀSerial to Parallel Interface (SPI)  
The sensor contains 64 on-chip 8 bit ADCs operating at 25.75 Msamples/s each, resulting  
in an aggregate pixel rate of 1.4 Gpix/s. The outputs of the 64 ADCs are multiplexed onto  
32 LVDS serial links operating at 412 Mbit/s each resulting in an aggregate data rate of  
13.3 Gbit/s.  
•ꢀ Limited supplies: Nominal 2.5V (some  
supplies require 3.3V)  
•ꢀ 0°C to 60°C operational temperature range  
•ꢀ 369-pin ceramic μPGA package  
•ꢀ Power dissipation: 1.1W  
The 32 data channel LVDS interface allows a very high data rate with a limited number  
of pins. Each channel runs at 51.5 MSPS pixel rate which results in 485 fps frame rate  
at full resolution. The LUPA 3000 can achieve higher frame rates by windowing which  
is programmable over the SPI interface. All required clocks, control, and bias signals are  
generated on-chip. The incoming high speed clock is divided to generate the different low  
speed clocks required for the operation of the sensor. The sensor generates all its bias signals  
from an internal bandgap reference. An on-chip sequencer generates all the required control  
signals for the image core, the ADCs, and the on-chip digital data processing path. The  
sequencer settings are stored in registers that can be programmed through the serial command  
interface. The sequencer supports windowed readout at frame rates up to 10,000 fps.  
APPLICATIONS  
High speed machine vision  
Holographic data storage  
Motion analysis  
Intelligent traffic system  
Medical imaging  
The LUPA 3000 production package will be housed in a 369-pin ceramic μPGA package  
and will be available in a monochrome version or Bayer (RGB) patterned color filter array  
with micro lens in Q409. Contact your local Cypress representative for more information.  
www.cypress.com/go/imagesensors  

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