PRELIMINARY
CY8CLEDAC03
Figure 3. Device Startup Sequencing
present to begin with, the controller enters STE mode at startup
as if a trailing edge dimmer were present.
Although the CY8CLEDAC03 has the ability to dynamically
switch between modes, at startup to avoid instability from
dimmer misbehavior the controller blanks out for approximately
the first sixteen AC half-cycles by entering special modes SLE or
STE respectively. In STE and SLE modes the controller will not
respond to sharp dV/dt signatures in the VIN signal. This avoids
instability, caused by for example, soft-start behavior of some
dimmers or mode changing due to dynamic load adaptation in
case of smart dimmers.
After exiting SLE or STE modes the controller enters the normal
“leading edge (LE) mode” or “trailing edge (TE) mode” respec-
tively.
Both the LE and TE modes have special modes called “leading
edge zero phase cut (LEZPC)” and “trailing edge zero phase cut
(TEZPC)” respectively. These modes are activated under the
following scenarios:
Dimmer Detection
1. In the absence of a dimmer at startup, the controller will enter
TEZPC mode after start up sequence.
Intelligent Wall Dimmer detection includes automatically
detecting presence or absence of a dimmer and, if present,
detecting the dimmer type (leading or trailing edge).
2. If in TE or LE modes and no sharp dV/dt signature is detected,
the controller switches to TEZPC or LEZPC modes respectively.
These modes are optimized for special cases where a dimmer
was detected at startup and during normal course of operation,
the phase cut vanished. This condition can occur in the case of
dimmers with internal bypass switches that short out the dimmer
at the maximum brightness setting, or in the case where an
external bypass switch is installed across the dimmer allowing
the dimmer to be shorted out by the user, or for certain dimmers
that have very small phase cut at full intensity.
Dimmer detection or discovery first occurs during the first four
AC half-cycles after startup and is then continually monitored.
During the first 4 four AC half-cycles the BOOST pin remains
high, placing a resistive load across the dimmer. As wall dimmers
are designed to work with resistive loads such as an incan-
descent lamp, loading the dimmer with a resistive load enables
accurate dimmer detection.
Figure 4 shows the AC line waveform with a leading edge and a
trailing edge dimmer loaded by a resistive load. Both types of
dimmers show a steep slope at some point of the AC cycle. If the
steep slope is a rising edge the dimmer is a leading edge type,
and if the steep slope is a falling edge the dimmer is a trailing
edge type.
The CY8CLEDAC03 can seamlessly switch between all
operating modes:
1. It can switch between LE and LEZPC, or TE and TEZPC
modes based on presence or absence of phase cut on a
cycle-by-cycle basis.
To determine whether a leading edge dimmer is present, the VIN
pin voltage is internally filtered and differentiated to identify the
largest positive and negative slopes in the rectified AC half-cycle.
If the positive (rising) slope is greater than 1.5 times the negative
(falling) slope, then a leading edge dimmer must be present.
2. It can switch from LE or LEZPC to TE mode and TE or TEZPC
to LE mode if it detects a clear signature of the other type of
phase cut for approximately 16 consecutive AC half-cycles. It
waits 16 AC half-cycles to avoid random dimmer detect switching
due to dimmer misbehavior or noise. This allows for mode
switching only if the dimmer has genuinely changed its mode of
operation.
During dimmer detection, the controller first determines whether
a leading edge dimmer is present. If a leading edge dimmer is
detected, the controller enters “startup leading edge (SLE)
mode”. If a leading edge dimmer is not detected the controller
enters “startup trailing edge (STE) mode”. If a dimmer is not
Figure 5 shows the internal state transtion diagram of
CY8CLEDAC03.
Document Number: 001-68337 Rev *A
Page 6 of 22
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