CY8CLED04D01, CY8CLED04D02, CY8CLED04G01
CY8CLED03D01, CY8CLED03D02, CY8CLED03G01
CY8CLED02D01, CY8CLED01D01
PowerPSoC® Intelligent LED Driver
PowerPSoC Intelligent LED Driver
1. Features
■ Integrated power peripherals
❐ Four internal 32 V low side N-Channel power
FETs
❐ Up to 9-bit DACs
■ Applications
❐ Programmable gain amplifiers
❐ Programmable filters and comparators
❐ 8 to 32-bit timers and counters
❐ Complex peripherals by combining blocks
❐ Configurable to all GPIO pins
❐ Stage LED lighting
❐ Architectural LED lighting
❐ General purpose LED lighting
❐ Automotive and emergency vehicle LED lighting
❐ Landscape LED lighting
❐ Display LED lighting
❐ Effects LED lighting
❐ Signage LED lighting
• R
– 0.5 for 1.0 A devices
DS(ON)
• Up to 2 MHz configurable switching frequency
❐ Four hysteretic controllers
• Independently programmable upper and
lower thresholds
• Programmable minimum ON/OFF timers
❐ Four low side gate drivers with programmable
drive strength
■ Programmable pin configurations
❐ 25 mA sink, 10 mA source on all GPIO and func-
tion pins
❐ Pullup, pull down, high Z, strong, or open drain
drive modes on all GPIO and function pins
❐ Up to 10 analog inputs on GPIO
❐ Two 30 mA analog outputs on GPIO
❐ Configurable interrupt on all GPIO
■ Device options
❐ CY8CLED04D0x
• Four internal FETs with 0.5 A and 1.0 A
options
• Four external gate drivers
❐ CY8CLED04G01
• Four external gate drivers
❐ CY8CLED03D0x
• Three internal FETs with 0.5 A and 1.0 A
options
• Three external gate drivers
❐ CY8CLED03G01
• Three external gate drivers
❐ CY8CLED02D01
• Two 1.0 A internal FETs
• Two external gate drivers
❐ CY8CLED01D01
• One 1.0 A internal FET
• One external gate driver
❐ Four precision high side current sense amplifiers
❐ Three 16-bit LED dimming modulators: PrISM,
DMM, and PWM
❐ Six fast response (100 ns) voltage comparators
❐ Six 8-bit reference DACs
■ Flexible on-chip memory
❐ 16 K Flash program storage 50,000 erase and
write cycles
❐ Built-in switching regulator eliminates external
5 V supply
❐ 1 K SRAM data storage
❐ Multiple topologies including floating load buck,
floating load buck-boost, and boost
❐ In-System Serial Programming (ISSP)
❐ Partial Flash updates
■ M8C CPU core
❐ Flexible protection modes
❐ EEPROM emulation in Flash
❐ Processor speeds up to 24 MHz
®
■ Advanced peripherals (PSoC Blocks)
■ Complete development tools
❐ Free development software: PSoC Designer™
❐ Full featured, In-Circuit Emulator and
Programmer
❐ Full speed emulation
❐ Complex breakpoint structure
❐ 128 kBytes trace memory
❐ Capacitive sensing application capability
❐ DMX512 interface
2
❐ I C master or slave
❐ Full-duplex UARTs
❐ Multiple SPI masters or slaves
❐ Integrated temperature sensor
❐ Up to 12-bit ADCs
■ 56-pin QFN package
❐ 6 to 12-bit incremental ADCs
Figure 1-1. PowerPSoC Architectural Block Diagram
Analog
Drivers
Port 2
Port 1
Port 0
FN0
CSA
CSA
SYSTEM BUS
Analog Mux Bus
PWM Controller
Channels(LV)
Gate
Power
Global Digital Interconnect
Logic Core
Driver(LV) FETs (HV)
Global Analog Interconnect
PrISM/ DMM/
PWM
PSoC CORE
Clock Signals
SRAM
(1 K bytes)
Hysteretic
DAC
Flash Nonvolatile
Memory(1 6 K )
Supervisory ROM
( SROM)
Decoder
GDRV
PWM
Analog Block
CPU
Core
(M 8C)
Sleep and
Watchdog
Interrupt
Controller
C1
System Bus
C2
C3
C4
C5
Hysteretic
DAC
PWM
GDRV
GDRV
24 MHz Internal Main
Oscillator(IMO)
Internal Low Speed
Oscillator( ILO)
Multiple Clock Sources
C6
ANALOG SYSTEM
Hysteretic
DAC
PWM
DIGITAL SYSTEM
Digital PSoC Block Array
DBB00 DBB 01 DCB 02 DCB 03
Comparator
Bank
Analog PSoC
Block Array
Analog
Ref
DAC
DAC
CT
SC
CT
SC
DBB01 DBB 11 DCB 12 DCB13
AINX
Hysteretic
2
Digital Rows
SC
SC
DAC
PWM
GDRV
DAC
2Analog Columns
DAC Bank
Vref
POR and LVD
Internal
Voltage
System Resets Reference
Digital
Clocks
MACs
(2)
Decimator
Type2)
IO Analog
Multiplexer
POWER PERIPHERALS
I2C
SW Regulator
(
PSoC SYSTEM RESOURCES
CSA
CSA
Cypress Semiconductor Corporation
Document Number: 001-46319 Rev. *M
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised February 28, 2011
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