Datasheet > CY8CLED04D01_11

CY8CLED04D01_11

更新时间： 2022-10-24 12:46:45

品牌	Logo	应用领域
赛普拉斯 - CYPRESS		驱动器
页数	文件大小	规格书
55页	1391K
描述
PowerPSoC? Intelligent LED Driver

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数据手册

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CY8CLED04D01_11 数据手册

CY8CLED04D01, CY8CLED04D02, CY8CLED04G01

CY8CLED03D01, CY8CLED03D02, CY8CLED03G01

CY8CLED02D01, CY8CLED01D01

Figure 3-4. CY8CLED03G01 Logic Block Diagram

CSA0

CSA1

CSA2

DAC0

CSP0

CSN0

Hysteretic Mode

External

GD 0

DAC1

Controller 0

Gate Drive 0

DAC2

CSP1

CSN1

External

Gate Drive 1

Hysteretic Mode

Controller 1

GD 1

DAC3

DAC4

DAC5

CSP2

CSN2

External

Gate Drive 2

Hysteretic Mode

Controller 2

GD 2

FN0[0:3]

Power Peripherals Digital Mux

Power Peripherals Analog Mux

3 Channel PWM/

PrISM/DMM

SREGHVIN

SREGSW

SREGCSP

SREGCSN

Auxiliary

Power

Regulator

From Analog Mux

AINX

SREGFB

SREGCOMP

Global Digital Interconnect

Global Analog Interconnect

PSoC CORE

SRAM

P2[2]

SROM

Flash 16K

Sleep and

Watchdog

CPU Core (M8C)

Interrupt

Controller

P1[0,1,4,5,7]

Clock Sources

(Includes IMO and ILO)

P0[3,4,5,7]

DIGITAL SYSTEM

ANALOG SYSTEM

Analog Ref.

Digital

Block

Array

Analog

Block Array

Digital

Clocks

Decimator Type

POR and LVD

System Resets

Internal

Voltage Ref. Input Muxing

Analog

2 MACs

I2C

SYSTEM RESOURCES

Document Number: 001-46319 Rev. *M

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