PRELIMINARY
PSoC® 5: CY8C55 Family Datasheet
17. Revision History
Description Title: PSoC® 5: CY8C55 Family Datasheet Programmable System-on-Chip (PSoC®)
Document Number: 001-44094
Submission
Date
Orig. of
Change
Rev.
ECN No.
Description of Change
**
2517856
2611826
17/06/08
11/24/08
DSG
GDK
New datasheet for new device CY8C55 Family Datasheet.
*A
Reorganized content to be consistent with the TRM
Added section on DAC. Updated Boost Converter section. Updated
Conversion Signals section. Classified Ordering Information according to
CPU speed; added information on security features and ROHS compliance
Added a section on XRES Specifications under Electrical Specification
Updated Analog Subsystem and CY8C55 Architecture block diagrams
Updated Electrical Specifications section
*B
*C
2707147
2759055
05/15/09
09/02/09
GDK/MKEA Updates to Electrical Specifications. Renamed CyDesigner as PSoC Creator
Added Analog Routing section. Content edits
MKEA
Updated Part Numbering Conventions. Added Section 11.7.5 (EMIF Figures
and Tables). Updated GPIO and SIO AC specifications. Updated XRES Pin
Description and Xdata Address Map specifications. Updated DFB and
Comparator specifications. Updated PHUB features section and RTC in
sleep mode. Updated IDAC and VDAC DC and Analog Global Specifications
Updated USBIO AC and Delta Sigma ADC specifications. Updated PPOR
and Voltage Monitors DC specifications. Updated Drive Mode diagram
Updated Analog Comparator and System diagrams
Other edits to electrical specifications
*D
2824626
12/09/09
MKEA
Updated I2C section to reflect 1 Mbps. Updated Table 11-6 and 11- 7 (Boost
AC and DC specs); also added Shottky Diode specs. Changed current for
sleep/hibernate mode to include SIO; Added footnote to analog global specs.
Updated Figures 1-1, 6-2, 7-14, and 8-1. Updated Table 6-2 and Table 6-3
(Hibernate and Sleep rows) and Power Modes section. Updated GPIO and
SIO AC specifications. Updated Gain error in IDAC and VDAC specifications.
Updated description of V
spec in Table 11-1 and removed GPIO Clamp
DDA
Current parameter. Moved FILO from ILO DC to AC table.
Added PCB Layout and PCB Schematic diagrams.
Updated Fgpioout spec (Table 11-9). Added duty cycle frequency in PLL AC
spec table. Added note for Sleep and Hibernate modes and Active Mode
specs in Table 11-2. Linked URL in Section 10.3 to PSoC Creator site.
Updated Ja and Jc values in Table 13-1. Updated Single Sample Mode and
Fast FIR Mode sections. Updated Input Resistance specification in Del-Sig
ADC table. Added Tio_init parameter. Updated PGA and UGB AC Specs.
Removed SPC ADC. Updated Boost Converter section.
Added section 'SIO as Comparator'; updated Hysteresis spec (differential
mode) in Table 11-10.
Updated V
condition and deleted Vstart parameter in Table 11-6.
BAT
Removed reference to Idle mode. CDT 59671: Updated footnotes and ADC
column in ordering information. Removed CSA (Section 8.7). Updated IMO
table and number of UDBs
*E
2873520
02/04/10
MKEA
Changed maximum value of PPOR_TR to '1'. Updated V
specification.
BIAS
Updated Figure 8-1 and Figure 6-3. Updated Interrupt Vector table, Updated
Sales links. Updated JTAG and SWD specifications. Removed Jp-p and
Jperiod from ECO AC Spec table. Added note on sleep timer in Table 11-2.
Updated ILO AC and DC specifications. Added Resolution parameter in
VDAC and IDAC tables. Updated I
typical and maximum values.
OUT
Changed Temperature Sensor range to -40 °C to +85 °C. Removed Latchup
specification from Table 11-1
Document Number: 001-44094 Rev. *J
Page 99 of 102
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