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CY8C5588LTI-114 PDF预览

CY8C5588LTI-114

更新时间： 2024-01-31 06:44:40
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟
页数 文件大小 规格书
102页 2766K
描述
Multifunction Peripheral, CMOS, 8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68

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CY8C5588LTI-114 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：QFN
包装说明：8 X 8 MM, 0.40 MM HEIGHT, ROHS COMPLAINT, MO-220, QFN-68针数：68
Reach Compliance Code：compliantHTS代码：8542.39.00.01
风险等级：5.84地址总线宽度：
边界扫描：YES总线兼容性：USB
最大时钟频率：80 MHz外部数据总线宽度：
JESD-30 代码：S-XQCC-N68JESD-609代码：e4
长度：8 mm湿度敏感等级：3
I/O 线路数量：48端子数量：68
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：HVQCCN
封装等效代码：LCC68,.32SQ,16封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：1.8/5 V认证状态：Not Qualified
RAM（字数）：32768ROM大小（位）：262144 Bits
座面最大高度：1 mm子类别：Other Microprocessor ICs
最大供电电压：5.5 V最小供电电压：1.71 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：NO LEAD
端子节距：0.4 mm端子位置：QUAD
处于峰值回流温度下的最长时间：20紫外线可擦：N
宽度：8 mmBase Number Matches：1

CY8C5588LTI-114 数据手册

 浏览型号CY8C5588LTI-114的Datasheet PDF文件第93页浏览型号CY8C5588LTI-114的Datasheet PDF文件第94页浏览型号CY8C5588LTI-114的Datasheet PDF文件第95页浏览型号CY8C5588LTI-114的Datasheet PDF文件第97页浏览型号CY8C5588LTI-114的Datasheet PDF文件第98页浏览型号CY8C5588LTI-114的Datasheet PDF文件第99页 
PRELIMINARY  
PSoC® 5: CY8C55 Family Datasheet  
Table 14-1. Acronyms Used in this Document (continued)  
14. Acronyms  
Acronym  
FIR  
Description  
finite impulse response, see also IIR  
flash patch and breakpoint  
full-speed  
Table 14-1. Acronyms Used in this Document  
Acronym  
abus  
Description  
FPB  
FS  
analog local bus  
ADC  
AG  
analog-to-digital converter  
analog global  
GPIO  
general-purpose input/output, applies to a PSoC  
pin  
AHB  
AMBA (advanced microcontroller bus archi-  
tecture) high-performance bus, an ARM data  
transfer bus  
HVI  
IC  
high-voltage interrupt, see also LVI, LVD  
integrated circuit  
ALU  
arithmetic logic unit  
IDAC  
IDE  
current DAC, see also DAC, VDAC  
integrated development environment  
AMUXBUS analog multiplexer bus  
2
API  
application programming interface  
I C, or IIC  
Inter-Integrated Circuit, a communications  
protocol  
APSR  
application program status register  
advanced RISC machine, a CPU architecture  
automatic thump mode  
IIR  
infinite impulse response, see also FIR  
internal low-speed oscillator, see also IMO  
internal main oscillator, see also ILO  
integral nonlinearity, see also DNL  
input/output, see also GPIO, DIO, SIO, USBIO  
initial power-on reset  
®
ARM  
ILO  
IMO  
INL  
ATM  
BW  
bandwidth  
CAN  
Controller Area Network, a communications  
protocol  
I/O  
CMRR  
CPU  
common-mode rejection ratio  
central processing unit  
IPOR  
IPSR  
IRQ  
ITM  
LCD  
LIN  
interrupt program status register  
interrupt request  
CRC  
cyclic redundancy check, an error-checking  
protocol  
instrumentation trace macrocell  
liquid crystal display  
DAC  
DFB  
DIO  
digital-to-analog converter, see also IDAC, VDAC  
digital filter block  
Local Interconnect Network, a communications  
protocol.  
digital input/output, GPIO with only digital  
capabilities, no analog. See GPIO.  
LR  
link register  
DMA  
DNL  
direct memory access, see also TD  
differential nonlinearity, see also INL  
port write data registers  
LUT  
LVD  
LVI  
lookup table  
low-voltage detect, see also LVI  
low-voltage interrupt, see also HVI  
low-voltage transistor-transistor logic  
multiply-accumulate  
DR  
DRES  
DSI  
digital logic reset  
LVTTL  
MAC  
MCU  
MISO  
NC  
digital system interconnect  
data watchpoint and trace  
error correcting code  
DWT  
ECC  
microcontroller unit  
master-in slave-out  
ECO  
EEPROM  
external crystal oscillator  
no connect  
electrically erasable programmable read-only  
memory  
NMI  
nonmaskable interrupt  
non-return-to-zero  
NRZ  
NVIC  
NVL  
opamp  
PAL  
EMI  
electromagnetic interference  
external memory interface  
end of conversion  
nested vectored interrupt controller  
nonvolatile latch, see also WOL  
operational amplifier  
EMIF  
EOC  
EOF  
EPSR  
ESD  
ETM  
end of frame  
programmable array logic, see also PLD  
program counter  
execution program status register  
electrostatic discharge  
embedded trace macrocell  
PC  
PCB  
PGA  
printed circuit board  
programmable gain amplifier  
Document Number: 001-44094 Rev. *J  
Page 96 of 102  
[+] Feedback  
1...93949596979899...102

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