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CY8C4126AZI-M443 PDF预览

CY8C4126AZI-M443

更新时间: 2024-11-05 21:20:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟外围集成电路
页数 文件大小 规格书
41页 652K
描述
Multifunction Peripheral, CMOS,

CY8C4126AZI-M443 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:LFQFP, QFP48,.35SQ,20Reach Compliance Code:compliant
ECCN代码:3A991.A.3HTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:2.17
边界扫描:NO总线兼容性:I2C; IRDA; LIN; SPI; UART
最大时钟频率:48 MHzJESD-30 代码:S-PQFP-G48
长度:7 mmI/O 线路数量:38
串行 I/O 数:7端子数量:48
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装等效代码:QFP48,.35SQ,20封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCHRAM(字数):8000
座面最大高度:1.6 mm最大压摆率:7.2 mA
最大供电电压:5.5 V最小供电电压:1.8 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmuPs/uCs/外围集成电路类型:MULTIFUNCTION PERIPHERAL
Base Number Matches:1

CY8C4126AZI-M443 数据手册

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PSoC® 4: PSoC 4100M Family  
Datasheet  
Programmable System-on-Chip (PSoC®)  
General Description  
PSoC® 4 is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an  
ARM® Cortex™-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The  
PSoC 4100M product family, based on this platform architecture, is a combination of a microcontroller with digital programmable logic,  
programmable analog, programmable interconnect, high-performance analog-to-digital conversion, opamps with comparator mode,  
and standard communication and timing peripherals. The PSoC 4100M products will be fully compatible with members of the PSoC 4  
platform for new applications and design needs. The programmable analog and digital subsystems allow flexibility and in-field tuning  
of the design.  
Features  
32-bit MCU Subsystem  
Serial Communication  
24-MHz ARM Cortex-M0 CPU with single-cycle multiply  
Up to 128 kB of flash with Read Accelerator  
Up to 16 kB of SRAM  
Four independent run-time reconfigurable serial  
communication blocks (SCBs) with reconfigurable I2C, SPI, or  
UART functionality  
Timing and Pulse-Width Modulation  
DMA engine  
Eight 16-bit timer/counter pulse-width modulator (TCPWM)  
blocks  
Programmable Analog  
Four opamps that operate in Deep Sleep mode at very low  
current levels  
Center-aligned, Edge, and Pseudo-random modes  
All opamps have reconfigurable high current pin-drive,  
high-bandwidth internal drive, ADC input buffering, and  
Comparator modes with flexible connectivity allowing input  
connections to any pin  
Comparator-based triggering of Kill signals for motor drive and  
other high-reliability digital logic applications  
Package Options  
Four current DACs (IDACs) for general-purpose or capacitive  
sensing applications on any pin  
68-pin QFN, 64-pin TQFP wide and narrow pitch, and 48-pin  
and 44-pin TQFP packages  
Two low-power comparators that operate in Deep Sleep mode  
12-bit SAR ADC with 806-Ksps conversion rate  
Up to 55 programmable GPIOs  
GPIO pins can be CapSense, LCD, analog, or digital  
Drive modes, strengths, and slew rates are programmable  
Low Power 1.71 to 5.5 V Operation  
20-nA Stop Mode with GPIO pin wakeup  
Extended Industrial Temperature Operation  
Hibernate and Deep Sleep modes allow wakeup-time versus  
power trade-offs  
–40 °C to +105 °C operation  
Capacitive Sensing  
PSoC Creator Design Environment  
Cypress Capacitive Sigma-Delta (CSD) technique provides  
best-in-class SNR (>5:1) and water tolerance  
Integrated Development Environment (IDE) provides  
schematic design entry and build (with analog and digital  
automatic routing)  
Cypress-supplied software component makes capacitive  
sensing design easy  
Applications Programming Interface (API component) for all  
fixed-function and programmable peripherals  
Automatic hardware tuning (SmartSense™)  
Segment LCD Drive  
Industry-Standard Tool Compatibility  
LCD drive supported on all pins (common or segment)  
Operates in Deep Sleep mode with 4 bits per pin memory  
After schematic entry, development can be done with  
ARM-based industry-standard development tools  
Cypress Semiconductor Corporation  
Document Number: 001-96519 Rev. *F  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 26, 2017  

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