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CY8C22345-24SXI PDF预览

CY8C22345-24SXI

更新时间: 2024-01-30 16:35:01
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 多功能外围设备微控制器和处理器光电二极管时钟
页数 文件大小 规格书
35页 919K
描述
PSoC Programmable System-on-Chip

CY8C22345-24SXI 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:SOIC包装说明:SOP, SOP28,.4
针数:28Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:2.23
Is Samacsys:N地址总线宽度:
位大小:8边界扫描:NO
CPU系列:M8C最大时钟频率:24 MHz
外部数据总线宽度:JESD-30 代码:R-PDSO-G28
JESD-609代码:e4长度:17.905 mm
湿度敏感等级:3I/O 线路数量:24
端子数量:28最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP28,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:3.3/5 V
认证状态:Not QualifiedRAM(字节):1024
RAM(字数):1000ROM(单词):16384
ROM可编程性:FLASH座面最大高度:2.67 mm
速度:24.6 MHz子类别:Microcontrollers
最大压摆率:12 mA最大供电电压:5.25 V
最小供电电压:4.75 V标称供电电压:5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:7.505 mmBase Number Matches:1

CY8C22345-24SXI 数据手册

 浏览型号CY8C22345-24SXI的Datasheet PDF文件第2页浏览型号CY8C22345-24SXI的Datasheet PDF文件第3页浏览型号CY8C22345-24SXI的Datasheet PDF文件第4页浏览型号CY8C22345-24SXI的Datasheet PDF文件第5页浏览型号CY8C22345-24SXI的Datasheet PDF文件第6页浏览型号CY8C22345-24SXI的Datasheet PDF文件第7页 
CY8C21345  
CY8C22345, CY8C22545  
®
PSoC Programmable System-on-Chip  
Programmable Pin Configurations:  
25 mA Sink, 10 mA Source on all GPIO  
Features  
Powerful Harvard Architecture Processor:  
M8C Processor Speeds up to 24 MHz  
8x8 Multiply, 32-Bit Accumulate  
Pull up, Pull down, High Z, Strong, or Open Drain Drive  
Modes on all GPIO  
Up to 38 Analog Inputs on GPIO  
Configurable Interrupt on all GPIO  
Low Power at High Speed  
3.0V to 5.25V Operating Voltage  
Industrial Temperature Range: -40°C to +85°C  
Advanced Peripherals (PSoC® Blocks)  
Six Analog Type “E” PSoC Blocks Provide:  
• Single or Dual 8-Bit ADC  
Additional System Resources:  
I2CSlave, Master, and MultiMaster to 400 kHz  
Supports Hardware Addressing Feature  
Watchdog and Sleep Timers  
User Configurable Low Voltage Detection  
Integrated Supervisory Circuit  
• Comparators (up to four)  
On-Chip Precision Voltage Reference  
Supports RTC Block into Digital Peripheral Logic  
Up to Eight Digital PSoC Blocks Provide:  
• 8 to 32-Bit Timers, Counters, and PWMs  
• One Shot, Multi Shot Mode Support in Timers and PWMs  
• PWM with Deadband Support in One Digital Block  
• Shift Register, CRC, and PRS Modules  
• Full Duplex UART  
Top Level Block Diagram  
Analog  
Drivers  
Port 4  
Port 3  
Port 2 Port 1 Port 0  
• Multiple SPI Masters or Slaves, Variable Data Length  
Support: 8 to 16-Bit  
PSoC Core  
• Can be Connected to all GPIO Pins  
Complex Peripherals by Combining Blocks  
Shift Function Support for FSK Detection  
Powerful Synchronize Feature Support. Analog Module  
OperationscanbeSynchronizedbyDigitalBlocksorExternal  
Signals.  
Global Digital Interconnect  
Global Analog Interconnect  
Flash 16K  
SRAM  
1K  
SROM  
Sleep and  
Watchdog  
CPU Core (M8C)  
High Speed 10-Bit SAR ADC with Sample and Hold Optimized  
for Embedded Control  
Interrupt  
Controller  
Precision, Programmable Clocking:  
Internal ± 5% 24/48 MHz Oscillator across the Industrial  
Multiple Clock Sources  
(Includes IMO, ILO, PLL, and ECO)  
Temperature Range  
ANALOG SYSTEM  
High Accuracy 24 MHz with Optional 32 kHz Crystal and PLL  
Optional External Oscillator, up to 24 MHz  
Internal/External Oscillator for Watchdog and Sleep  
DIGITAL SYSTEM  
Digital Block Array  
Analog Input  
Muxing(L,R)  
Analog  
Ref  
=
DBC DBC DCC DCC  
ROW 1  
Flexible On-Chip Memory:  
Up to 16K Bytes Flash Program Storage 50,000 Erase/Write  
Cycles  
Analog Block Array  
CTE CTE CTE CTE  
SCE SCE  
DBC DBC DCC DCC  
ROW 2  
Up to 1K Byte SRAM Data Storage  
In-System Serial Programming (ISSP)  
Partial Flash Updates  
Flexible Protection Modes  
EEPROM Emulation in Flash  
CapSense  
Digital Resource  
10-bit SAR  
ADC  
Optimized CapSense® Resource:  
Two IDAC Support up to 640 µA Source Current to Replace  
External Resistor  
Two Dedicated Clock Resources for CapSense:  
• CSD_CLK: 1/2/4/8/16/32/128/256 Derive from SYSCLK  
• CNT_CLK: 1/2/4/8 Derive from CSD_CLK  
Dedicated 16-Bit Timers/Counters for CapSense Scanning  
Support Dual CSD Channels Simultaneous Scanning  
POR and LVD  
System Resets  
Internal  
Voltage  
Ref.  
I2C  
Digital  
Clocks  
MACs  
SYSTEM RESOURCES  
Cypress Semiconductor Corporation  
Document Number: 001-43084 Rev. *L  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised December 17, 2010  
[+] Feedback  

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