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CY7C68310

更新时间： 2024-11-27 00:00:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS /
页数 文件大小 规格书
34页 541K
描述
ISD-300LP⑩ Low-Power USB 2.0 to ATA/ATAPI Bridge IC

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中文翻译

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CY7C68310 数据手册

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CY7C68310  
ISD-300LP™ Low-Power USB 2.0 to ATA/ATAPI Bridge IC  
• Three General Purpose I/O (GPIO) pins  
1.0  
Features  
• Multiple LUNs supported within a single ATAPI device  
• Fixed-function mass storage device–requires no firmware  
code  
• ATA translation provides seamless ATA support with  
standard MSC drivers  
• USBMassStorageClassBulk-Onlyspecification-compliant  
(version 1.0)  
• Additional ATA command support provided by vendor-  
specific ATACBs (ATA command blocks utilizing the MSC  
Command Block Wrapper)  
• USB 2.0-certified (TID# 40001426)  
• Integrated USB transceiver  
• High-speed (480-Mbit) and full-speed (12-Mbit) support  
• USB Suspend/Resume, Remote Wakeup support  
• Provisions to share ATA bus with other hosts (e.g.  
USB/1394 dual device)  
• Manufacturing interconnect test support provided with  
vendor-specific USB commands:  
• Two power modes of operation–self-powered and USB bus-  
powered  
• Read/Write access to relevant ASIC pins  
• Manufacturing Interconnect Test Tools  
• Utilizes inexpensive 30-Mhz crystal for clock source.  
• Low power consumption allows for bus-powered opera-  
tion  
• VBUS-powered CF support  
• True USB portable HDD support  
• Compact 80-pin TQFP package with a Lead-Free option  
1.1  
Functional Block Diagram  
• ATA/ATAPI-6 specification-compliant–provides support for  
mass storage devices larger than 137GB  
VBUS  
D+  
USB HS/FS  
Control Logic  
USB  
2.0  
Xcvr  
• 5V tolerant inputs, 3.3V output drive  
D-  
• Flexible USB descriptor and configuration retrieval sources  
• I2C-compatible serial ROM interface  
OSC  
• ATAinterfaceusingvendor-specificATAcommand(FBh)  
implemented on ATAPI or ATA device  
nEJECT  
SYSIRQ  
LOWPWR  
DRVPWRVLD  
CY7C68310  
nPWR500  
VBUSPWRVLD  
VBUSPWRD  
nRESET  
• Default on-chip ROM contents for manufacturing/devel-  
opment  
• 2-Kbyte SRAM data buffer for ATA/ATAPI data transfers  
Control Logic  
DISKRDY  
GPIO Pins (3)  
• ATA interface supports ATA PIO modes 0–4, UDMA modes  
0–4 (multiword DMA not supported). ATA interface  
operation mode is automatically selected during device  
initialization or manually programmed with I2C-compatible  
configuration data  
ROM  
SCL  
64 Byte  
RAM  
EEPROM  
Interface  
Control  
2kByte FIFO  
SDA  
• Automatic detection of either Master or Slave ATA/ATAPI  
devices  
• Mode Page 5 Support–increased support for formatting  
removable media devices  
ATAEN  
ATA Interface Logic  
• ATA Interrupt support for ATAPI devices–offers more robust  
ATA support across OS platforms  
• System event notification via Vendor-specific ATA  
command  
• Input pin for media cartridge detection or ejection request  
Figure 1-1. Block Diagram  
• USB bus state indications (Reset, FS/HS mode of oper-  
ation, Suspend/Resume, Bus/Self-powered)  
Cypress Semiconductor Corporation  
Document 38-08030 Rev. *H  
•
3901 North First Street  
•
San Jose, CA 95134  
•
408-943-2600  
Revised June 28, 2004  
1234567...34

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