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CY7C69356-48LTXC PDF预览

CY7C69356-48LTXC

更新时间: 2024-02-05 18:02:03
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟数据传输外围集成电路
页数 文件大小 规格书
31页 2872K
描述
USB Bus Controller, CMOS, QFN-48

CY7C69356-48LTXC 技术参数

是否Rohs认证: 符合生命周期:End Of Life
包装说明:HVQCCN,Reach Compliance Code:compliant
ECCN代码:3A991.A.3HTS代码:8542.31.00.01
Factory Lead Time:1 week风险等级:6.98
地址总线宽度:总线兼容性:I2C; SMBUS; SPI; USB
最大时钟频率:24 MHz最大数据传输速率:1.5 MBps
外部数据总线宽度:JESD-30 代码:S-XQCC-N48
长度:7 mm端子数量:48
最高工作温度:70 °C最低工作温度:
封装主体材料:UNSPECIFIED封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度:1 mm最大供电电压:5.5 V
最小供电电压:1.71 V标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:0.5 mm端子位置:QUAD
宽度:7 mmuPs/uCs/外围集成电路类型:BUS CONTROLLER, UNIVERSAL SERIAL BUS
Base Number Matches:1

CY7C69356-48LTXC 数据手册

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CY7C69356  
TrueTouch® Multi-Touch Gesture  
Full Speed USB Controller  
TrueTouch® Multi-Touch Gesture Full Speed USB Controller  
Full speed emulation  
Complex breakpoint structure  
128-K trace memory  
Features  
Powerful Harvard-architecture processor  
M8C processor speeds running up to 24 MHz  
Low power at high processing speeds  
Interrupt controller  
1.71 V to 5.5 V operating voltage without USB  
Commercial temperature range: 0 °C to +70 °C  
Precision, programmable clocking  
Internal ± 5.0 percent 6, 12, or 24 MHz main oscillator  
Internal low-speed oscillator at 32 kHz for Watchdog and  
Sleep  
Optional external 32-kHz crystal  
TrueTouch™ capacitive touchscreen controller  
Supports single-touch and multi-touch applications  
Supports up to 33 X/Y sensor inputs  
Supports screen sizes 5.6 inch and below (typical)  
Fast scan rates: Typical 400 µs per sensor  
0.25 percent accuracy for USB with no external components  
Programmable pin configurations  
25 mA sink current on all GPIO  
Pull up, High Z, open drain CMOS drive modes on all GPIO  
CMOS drive mode on ports 0 and 1  
Up to 36 analog inputs on GPIO  
Includes gesture detection library  
Configurable inputs on all GPIO  
Allows development of customized gestures  
Selectable, regulated digital I/O on port 1  
Configurable input threshold for port 1  
3.0 V, 20 mA total port 1 source current  
5 mA source current mode on ports 0 and 1  
Hot-swap capable on all Port1GPIO  
Low-power TrueTouch block  
2.5 mA average supply current at 8-ms report rate  
1.25 mA average supply current at 16-ms report rate  
Flexible on-chip memory  
Program and data storage options:  
• 32-KB flash  
50,000 erase and write cycles  
2048 bytes SRAM data storage  
Partial flash updates  
Versatile analog mux  
Common internal analog bus  
Simultaneous connection of I/O combinations  
High PSRR comparator  
Low dropout voltage regulator for the analog array  
Flexible protection modes  
In-system serial programming (ISSP)  
Additional system resources  
I2C slave  
Full-speed USB (12 Mbps)  
Eight uni-directional endpoints  
One bi-directional control endpoint  
USB 2.0 compliant  
Dedicated 512 byte buffer  
• Selectable to 50 kHz, 100 kHz, or 400 kHz  
• Implementation requires no clock stretching  
• Implementation during sleep modes with less than 100 A  
• Hardware address detection  
SPI master and SPI slave  
• Configurable between 46.9 kHz and 12 MHz  
Three 16-bit timers  
Watchdog and sleep timers  
Internal voltage reference  
Integrated supervisory circuit  
Internal 3.3-V output regulator  
Available on 48-pin QFN packages only  
Operating voltage with USB enabled:  
• 3.15 V to 3.45 V when supply voltage is around 3.3 V  
• 4.35 V to 5.25 V when supply voltage is around 5.0 V  
Complete development tools  
Free development tool (PSoC Designer™)  
Full-featured, in-circuit emulator, and programmer  
8- to 10-bit Incremental analog-to-digital converter (ADC)  
Package options  
48-pin 7 × 7 × 1.0 mm QFN  
CONFIDENTIAL - RELEASED ONLY UNDER NONDISCLOSURE AGREEMENT (NDA)  
Cypress Semiconductor Corporation  
Document Number: 001-86334 Rev. *B  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised April 15, 2016  

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