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CY7C65642

更新时间： 2024-11-27 09:45:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 控制器
页数 文件大小 规格书
21页 539K
描述
HX2VL – Very Low Power USB 2.0 TetraHub Controller

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中文翻译

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CY7C65642 数据手册

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PRELIMINARY  
CY7C65642  
HX2VL – Very Low Power USB 2.0  
TetraHub™ Controller  
❐ Integrated port status indicator control  
Features  
❐ 12-MHz +/-500 ppm external crystal with drive level 600 μW  
(integrated PLL) clock input with optional 27/48-MHz  
oscillator clock input.  
■ High-performance, low-power USB 2.0 hub, optimized for low-  
cost designs with minimum bill-of-material (BOM).  
❐ Internal power failure detection for ESD recovery  
■ USB 2.0 hub controller  
■ Downstream port management  
❐ Compliant with USB2.0 specification  
❐ Up to four downstream ports support  
❐ Downstream ports are backward compatible with FS, LS  
❐ Multiple translator (TT), one per downstream port for  
maximum performance.  
❐ Support individual and ganged mode power management  
❐ Overcurrent detection within 8 mS.  
❐ Two status indicators per downstream port  
❐ Slew rate control for EMI management  
■ Maximum configurability  
■ Very low-power consumption  
❐ VID and PID are configurable through external EEPROM  
❐ Number of ports, removable/non-removable ports are  
configurable through EEPROM and I/O pin configuration  
❐ I/O pins can configure gang/individual mode power  
switching, reference clock source and polarity of power  
switch enable pin  
❐ Supports bus-powered and self-powered modes  
❐ Auto switching between bus-powered and self-powered  
❐ Single MCU with 2 K ROM and 64 byte RAM  
❐ Lowest power consumption.  
■ Highly integrated solution for reduced BOM cost  
❐ Internal regulator - single power supply 5 V required.  
❐ Provision of connecting 3.3 V with external regulator.  
❐ Integrated upstream pull-up resistor  
❐ Integrated pull-down resistors for all downstream ports  
❐ Integrated upstream/downstream termination resistors  
❐ Configuration options also available through mask ROM  
■ Available in space saving 48-pin (7 × 7 mm) TQFP and 28-pin  
(5 × 5 mm) QFN packages  
■ Supports 0 °C to +70 °C temperature range  
Block Diagram  
I2C /  
SPI  
MCU  
D+  
D-  
RAM ROM  
12/27/48  
MHz  
OSC-in  
OR 12  
MHz  
USB 2.0 PHY  
PLL  
USB Upstream Port  
Serial  
Interface  
Engine  
HS USB  
Control Logic  
Crystal  
5 V i/p (for internal  
regulator)  
NC (for external regulator)  
Transaction Translator x 4  
1.8 V  
Regulator  
Hub Repeater  
3.3 V  
3.3 V i/p (with ext. reg. & 28-QFN  
NC (with ext. reg. & 48-TQFP)  
3.3 V o/p (for int. reg.)  
Routing Logic  
USB Downstream Port 1  
USB Downstream Port 2  
USB Downstream Port 3  
USB Downstream Port 4  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
LED  
LED  
LED  
LED  
D+ D-  
D+ D-  
D+ D-  
D+ D-  
Cypress Semiconductor Corporation  
Document Number: 001-65659 Rev. *A  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised June 29, 2011  
[+] Feedback  
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