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CY7C65634-48AXC

更新时间： 2024-11-24 12:22:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 控制器
页数 文件大小 规格书
25页 662K
描述
HX2VL™ Very Low Power USB 2.0 Hub Controller

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中文翻译

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CY7C65634-48AXC 技术参数

是否Rohs认证： 符合生命周期：Active
零件包装代码：QFP包装说明：LFQFP, QFP48,.35SQ,20
针数：48Reach Compliance Code：compliant
ECCN代码：5A991.GHTS代码：8542.31.00.01
Factory Lead Time：1 week风险等级：2.34
其他特性：ALSO OPERATES AT 27 MHZ OR 48 MHZ CLOCK FREQUENCY地址总线宽度：
总线兼容性：I2C最大时钟频率：12 MHz
外部数据总线宽度：JESD-30 代码：S-PQFP-G48
JESD-609代码：e4长度：7 mm
湿度敏感等级：3端子数量：48
最高工作温度：70 °C最低工作温度：
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装等效代码：QFP48,.35SQ,20封装形状：SQUARE
封装形式：FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：3.3/5 V认证状态：Not Qualified
座面最大高度：1.6 mm子类别：Bus Controllers
最大压摆率：99.78 mA最大供电电压：5.5 V
最小供电电压：1.8 V标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：COMMERCIAL端子面层：Gold (Au)
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：40
宽度：7 mmuPs/uCs/外围集成电路类型：BUS CONTROLLER, UNIVERSAL SERIAL BUS

CY7C65634-48AXC 数据手册

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CY7C65632, CY7C65634  
HX2VL™ Very Low Power USB 2.0  
Hub Controller  
HX2VL™ Very Low Power USB 2.0 Hub Controller  
❐ Integrated port status indicator control  
Features  
❐ 12 MHz +/– 500 ppm external crystal with drive level 600 µW  
(integrated PLL) clock input with optional 27/48 MHz  
oscillator clock input  
■ High performance, low-power USB 2.0 Hub, optimized for low  
cost designs with minimum Bill-of-material  
❐ Internal power failure detection for ESD recovery  
■ USB 2.0 hub controller  
■ Downstream port management  
❐ Support individual and ganged mode power management  
❐ Overcurrent detection  
❐ Two port status indicators per downstream port  
❐ Slew rate control for EMI management  
❐ Compliant with USB 2.0 specification  
❐ Up to four downstream ports support  
❐ Downstream ports are backward compatible with FS, LS  
❐ Single transaction translator (TT) for low cost  
■ Very low power consumption  
■ Maximum configurability  
❐ VID and PID are configurable through external EEPROM  
❐ Number of ports, removable/non-removable ports are  
configurable through EEPROM and I/O pin configuration  
❐ I/O pins can configure gang/individual mode power  
switching, reference clock source and polarity of power  
switch enable pin  
❐ Supports bus-powered and self-powered modes  
❐ Auto switching between bus-powered and self-powered  
❐ Single MCU with 2K ROM and 64 byte RAM  
❐ Lowest power consumption  
■ Highly integrated solution for reduced BOM cost  
❐ Internal regulator – single power supply 5 V required  
❐ Provision of connecting 3.3 V with external regulator  
❐ Integrated upstream pull-up resistor  
❐ Configuration options also available through mask ROM  
■ Available in space saving 48-pin (7 × 7 mm) TQFP and 28-pin  
❐ Integrated pull-down resistors for all downstream ports  
❐ Integrated upstream/downstream termination resistors  
(5 × 5 mm) QFN packages  
■ Supports 0 °C to 70 °C temperature range  
Block Diagram – CY7C6563X  
I2C /  
SPI  
MCU  
D+  
D-  
RAM ROM  
12/27/48  
MHz  
OSC-in  
OR 12  
MHz  
USB 2.0 PHY  
PLL  
Serial  
Interface  
Engine  
HS USB  
Control Logic  
USB Upstream Port  
Crystal  
5V i/p (for internal regulator)  
NC (for external regulator)  
Transaction Translator  
1.8V  
3.3V  
Regulator  
Hub Repeater  
3.3V i/p (with ext. reg. & 28 QFN)  
NC (with ext. reg. & 48 TQFP)  
3.3V o/p (for int. reg.)  
Routing Logic  
USB Downstream Port 1  
USB Downstream Port 2  
USB Downstream Port 3  
USB Downstream Port 4  
For two port version, USB Downstream  
ports 3 and 4 are to be No connect from  
the Chip I/O perspective.  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
USB 2.0  
PHY  
Port  
Control  
LED  
LED  
LED  
LED  
D+ D-  
D+ D-  
D+ D-  
D+ D-  
Cypress Semiconductor Corporation  
Document Number: 001-67568 Rev. *F  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised July 2, 2012  
1234567...25

中文翻译

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