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CY7C6431X_09 PDF预览

CY7C6431X_09

更新时间: 2024-11-17 06:51:47
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 控制器
页数 文件大小 规格书
28页 691K
描述
enCoRe V Full Speed USB Controller

CY7C6431X_09 数据手册

 浏览型号CY7C6431X_09的Datasheet PDF文件第2页浏览型号CY7C6431X_09的Datasheet PDF文件第3页浏览型号CY7C6431X_09的Datasheet PDF文件第4页浏览型号CY7C6431X_09的Datasheet PDF文件第5页浏览型号CY7C6431X_09的Datasheet PDF文件第6页浏览型号CY7C6431X_09的Datasheet PDF文件第7页 
CY7C6431x  
CY7C64345, CY7C6435x  
enCoRe™ V Full Speed USB Controller  
Features  
Powerful Harvard Architecture Processor  
M8C processor speeds running up to 24 MHz  
Low power at high processing speeds  
Interrupt controller  
Programmable Pin Configurations  
25 mA sink current on all GPIO  
Pull Up, High Z, Open Drain, CMOS drive modes on all GPIO  
Configurable inputs on all GPIO  
3.0V to 5.5V operating voltage without USB  
Operating voltage with USB enabled:  
• 3.15 to 3.45V when supply voltage is around 3.3V  
• 4.35 to 5.25V when supply voltage is around 5.0V  
Temperature range: 0°C to 70°C  
Low dropout voltage regulator for Port 1 pins. Programmable  
to output 3.0, 2.5, or 1.8V at the I/O pins  
Selectable, regulated digital I/O on Port 1  
• Configurable input threshold for Port 1  
• 3.0V, 20 mA total Port 1 source current  
• Hot-swappable  
Flexible On-Chip Memory  
5 mA strong drive mode on Ports 0 and 1  
Up to 32K Flash program storage  
• 50,000 erase and write cycles  
• Flexible protection modes  
Up to 2048 bytes SRAM data storage  
In-System Serial Programming (ISSP)  
Full-Speed USB (12 Mbps)  
Eight unidirectional endpoints  
One bidirectional control endpoint  
USB 2.0 compliant  
Dedicated 512 bytes buffer  
No external crystal required  
Complete Development Tools  
Free development tool (PSoC Designer™)  
Full featured, in-circuit emulator and programmer  
Full speed emulation  
Complex breakpoint structure  
128K trace memory  
Additional System Resources  
Configurable communication speeds  
I2C slave  
• Selectable to 50 kHz, 100 kHz, or 400 kHz  
• Implementation requires no clock stretching  
• Implementation during sleep modes with less than 100 μA  
• Hardware address detection  
SPI master and SPI slave  
• Configurable between 93.75 kHz and 12 MHz  
Three 16-bit timers  
Precision, Programmable Clocking  
Crystal-less oscillator with support for an external crystal or  
resonator  
Internal ±5.0% 6, 12, or 24 MHz main oscillator  
• 0.25% accuracy with Oscillator Lock to USB data, no  
external components required  
8-bit ADC used to monitor battery voltage or other signals -  
• Internal low speed oscillator at 32 kHz for watchdog and  
sleep. The frequency range is 19 to 50 kHz with a 32 kHz  
typical value  
with external components  
Watchdog and sleep timers  
Integrated supervisory circuit  
enCoRe V Block Diagram  
Port 4  
Port 3 Port 2 Port 1 Port 0 Prog. LDO  
enCoRe V  
CORE  
System Bus  
SRAM  
2048 Bytes  
SROM  
Flash 32K  
CPU Core  
(M8C)  
Sleep and  
Watchdog  
Interrupt  
Controller  
6/12/24 MHz Internal Main Oscillator  
POR and LVD  
I2C Slave/SPI  
Full  
Speed  
USB  
3 16-Bit  
Timers  
Master-Slave  
System Resets  
SYSTEM RESOURCES  
Cypress Semiconductor Corporation  
Document Number: 001-12394 Rev *G  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 30, 2009  
[+] Feedback  

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