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CY7C64345-32LKXC PDF预览

CY7C64345-32LKXC

更新时间： 2024-11-17 03:51:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 总线控制器微控制器和处理器外围集成电路时钟
页数 文件大小 规格书
26页 635K
描述
enCoRe⑩ V Full-Speed USB Controller

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中文翻译

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CY7C64345-32LKXC 技术参数

是否Rohs认证：符合生命周期：Obsolete
零件包装代码：QFN包装说明：5 X 5 MM, 0.60 MM HEIGHT, QFN-32
针数：32Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.67
Is Samacsys：N地址总线宽度：
最大时钟频率：24 MHz外部数据总线宽度：
JESD-30 代码：S-XQCC-N32长度：5 mm
端子数量：32最高工作温度：70 °C
最低工作温度：封装主体材料：UNSPECIFIED
封装代码：HVQCCN封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE认证状态：Not Qualified
座面最大高度：0.55 mm最大供电电压：5.5 V
最小供电电压：3 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD宽度：5 mm
uPs/uCs/外围集成电路类型：BUS CONTROLLER, UNIVERSAL SERIAL BUSBase Number Matches：1

CY7C64345-32LKXC 数据手册

 浏览型号CY7C64345-32LKXC的Datasheet PDF文件第2页浏览型号CY7C64345-32LKXC的Datasheet PDF文件第3页浏览型号CY7C64345-32LKXC的Datasheet PDF文件第4页浏览型号CY7C64345-32LKXC的Datasheet PDF文件第5页浏览型号CY7C64345-32LKXC的Datasheet PDF文件第6页浏览型号CY7C64345-32LKXC的Datasheet PDF文件第7页 
CY7C6435x  
PRELIMINARY  
CY7C64345, CY7C6431x  
enCoRe™ V Full-Speed USB Controller  
❐ Configurable inputs on all GPIO  
❐ Low dropout voltage regulator for Port1 pins. Programmable  
to output 3.0, 2.5, or 1.8V at the IO pins.  
❐ Selectable, regulated digital IO on Port 1  
• Configurable Input Threshold for Port 1  
• 3.0V, 20 mA Total Port 1 Source Current  
• Hot-Swappable  
Features  
■ Powerful Harvard Architecture Processor  
❐ M8C Processor speeds running up to 24 MHz  
❐ Low power at high processing speeds  
❐ Interrupt controller  
❐ 3.0V to 5.5V Operating voltage  
❐ Temperature range: 0°C to 70°C  
❐ 5 mA Strong drive mode on Ports 0 and 1  
■ Flexible On-Chip Memory  
❐ Up to 32K Flash program storage  
50,000 Erase/write cycles  
❐ Up to 2048 bytes SRAM data storage  
❐ Flexible protection modes  
❐ In-System Serial Programming (ISSP)  
■ Full-Speed USB (12 Mbps)  
❐ Eight unidirectional endpoints  
❐ One bidirectional control endpoint  
❐ USB 2.0 compliant  
❐ Dedicated 512 bytes buffer  
❐ No external crystal required  
■ Complete Development Tools  
❐ Free development tool (PSoC Designer™)  
❐ Full-featured, in-circuit emulator and programmer  
❐ Full-speed emulation  
■ Additional System Resources  
❐ Configurable communication speeds  
❐ I2C™ slave  
• Selectable to 50 kHz, 100 kHz, or 400 kHz  
❐ Complex breakpoint structure  
❐ 128K Trace memory  
• Implementation requires no clock stretching  
• Implementation during sleep modes with less than 100 μA  
• Hardware address detection  
❐ SPI master and SPI slave  
• Configurable between 46.9 kHz - 3 MHz  
❐ Three 16-bit timers  
❐ 10-bit ADC to use for monitoring battery voltage or other sig-  
nals  
❐ Watchdog and sleep timers  
❐ Integrated supervisory circuit  
■ Precision, Programmable Clocking  
❐ Crystal-less oscillator with support for an external crystal or  
resonator  
❐ Internal ±5.0% 6/12/24 MHz main oscillator  
❐ Internal low-speed oscillator at 32 kHz for watchdog and  
sleep. Thefrequencyrangeis19-50kHzwitha32kHztypical  
value.  
❐ 0.25% Accuracy for USB with no external components  
■ Programmable Pin Configurations  
❐ 25 mA Sink current on all GPIO  
❐ Pull up, high Z, open drain, CMOS drive modes on all GPIO  
enCoRe V  
Port 4  
Port 3 Port 2 Port 1 Port 0 Prog. LDO  
Block Diagram  
enCoRe V  
CORE  
System Bus  
SRAM  
2048 Bytes  
SROM  
Flash 32K  
CPU Core  
(M8C)  
Sleep and  
Watchdog  
Interrupt  
Controller  
6/12/24 MHz Internal Main Oscillator  
POR and LVD  
I2C Slave/SPI  
Full  
Speed  
USB  
3 16-Bit  
Timers  
Master-Slave  
System Resets  
SYSTEM RESOURCES  
Cypress Semiconductor Corporation  
Document Number: 001-12394 Rev. *D  
•
198 Champion Court  
•
San Jose, CA 95134-1709  
•
408-943-2600  
Revised October 17, 2007  
[+] Feedback  
1234567...26

中文翻译

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