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CY7C63823-3XW14C PDF预览

CY7C63823-3XW14C

更新时间: 2024-11-11 09:45:43
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 控制器
页数 文件大小 规格书
86页 1587K
描述
enCoRe? II Low Speed USB Peripheral Controller

CY7C63823-3XW14C 数据手册

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CY7C63310, CY7C638xx  
enCoRe™ II  
Low Speed USB Peripheral Controller  
125 mA 3.3 V voltage regulator powers external 3.3 V devices  
3.3 V I/O pins  
Features  
USB 2.0-USB-IF certified (TID # 40000085)  
4 I/O pins with 3.3 V logic levels  
enCoRe™ II USB - ‘enhanced Component Reduction’  
Each 3.3 V pin supports high impedance input, internal  
pull-up, open drain output or traditional CMOS output  
Crystalless oscillator with support for an external clock. The  
internal oscillator eliminates the need for an external crystal  
or resonator.  
SPI serial communication  
Master or slave operation  
Two internal 3.3 V regulators and an internal USB Pull-up  
resistor  
Configurable up to 4 Mbit/second transfers in the master  
mode  
Configurable I/O for real world interface without external  
components  
Supports half duplex single data line mode for optical sensors  
USB Specification compliance  
2-channel 8-bit or 1-channel 16-bit capture timer registers.  
Capture timer registers store both rising and falling edge times.  
Conforms to USB Specification, Version 2.0  
Conforms to USB HID Specification, Version 1.1  
Supports one low speed USB device address  
Supports one control endpoint and two data endpoints  
Two registers each for two input pins  
Separate registers for rising and falling edge capture  
Simplifies the interface to RF inputs for wireless applications  
Internal low power wakeup timer during suspend mode:  
Periodic wakeup with no external components  
12-bit Programmable Interval Timer with interrupts  
Advanced development tools based on Cypress PSoC® tools  
Watchdog timer (WDT)  
Integrated USB transceiver with dedicated 3.3 V regulator for  
USB signalling and D– pull-up.  
Enhanced 8-bit microcontroller  
Harvard architecture  
M8C CPU speed is up to 24 MHz or sourced by an external  
clock signal  
Low-voltage detection with user configurable threshold  
voltages  
Internal memory  
Up to 256 bytes of RAM  
Operating voltage from 4.0 V to 5.5 V DC  
Operating temperature from 0–70 °C  
Up to eight Kbytes of flash including EEROM emulation  
Interface can auto configure to operate as PS/2 or USB  
Available in 16 and 18-pin PDIP; 16, 18, and 24-pin SOIC;  
24-pin QSOP, and 32-pin QFN packages  
No external components for switching between PS/2 and  
USB modes  
Industry standard programmer support  
No General Purpose I/O (GPIO) pins required to manage  
dual mode capability  
0.1 Applications  
Low power consumption  
Typically 10 mA at 6 MHz  
10 μA sleep  
The CY7C63310/CY7C638xx is targeted for the following  
applications:  
PC HID devices  
Mice (optomechanical, optical, trackball)  
Gaming  
In system reprogrammability:  
Allows easy firmware update  
GPIO ports  
Joysticks  
Game pad  
Up to 20 GPIO pins  
2 mA source current on all GPIO pins. Configurable 8 or  
General purpose  
Barcode scanners  
POS terminal  
50 mA/pin current sink on designated pins.  
Each GPIO port supports high impedance inputs,  
configurable pull-up, open drain output, CMOS/TTL inputs,  
and CMOS output  
Consumer electronics  
Toys  
Maskable interrupts on all I/O pins  
A dedicated 3.3 V regulator for the USB PHY. Aids in signalling  
and D– line pull-up  
Remote controls  
Security dongles  
Cypress Semiconductor Corporation  
Document 38-08035 Rev. *N  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised March 18, 2011  
[+] Feedback  

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