5秒后页面跳转
CY7C4806V25-166C PDF预览

CY7C4806V25-166C

更新时间: 2024-11-27 14:33:11
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 先进先出芯片
页数 文件大小 规格书
5页 115K
描述
FIFO, 16KX80, 4ns, Synchronous, CMOS, PBGA288, 19 X 19 MM, 1 MM PITCH, FBGA-288

CY7C4806V25-166C 技术参数

生命周期:Obsolete零件包装代码:BGA
包装说明:19 X 19 MM, 1 MM PITCH, FBGA-288针数:288
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.84
Is Samacsys:N最长访问时间:4 ns
周期时间:6 nsJESD-30 代码:S-PBGA-B288
JESD-609代码:e0长度:19 mm
内存密度:1310720 bit内存宽度:80
功能数量:1端子数量:288
字数:16384 words字数代码:16000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:16KX80
可输出:YES封装主体材料:PLASTIC/EPOXY
封装代码:LBGA封装形状:SQUARE
封装形式:GRID ARRAY, LOW PROFILE并行/串行:PARALLEL/SERIAL
认证状态:Not Qualified座面最大高度:1.4 mm
最大供电电压 (Vsup):2.625 V最小供电电压 (Vsup):2.375 V
标称供电电压 (Vsup):2.5 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:TIN LEAD端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
宽度:19 mmBase Number Matches:1

CY7C4806V25-166C 数据手册

 浏览型号CY7C4806V25-166C的Datasheet PDF文件第2页浏览型号CY7C4806V25-166C的Datasheet PDF文件第3页浏览型号CY7C4806V25-166C的Datasheet PDF文件第4页浏览型号CY7C4806V25-166C的Datasheet PDF文件第5页 
CY7C4808V25  
CY7C4806V25  
CY7C4804V25  
5/0251  
ADVANCE INFORMATION  
2.5V 4K/16K/64K x 80 Unidirectional  
Synchronous FIFO w/Bus Matching  
• Bus matching on both ports: x80, x40, x20, x10  
• Free-running CLKA and CLKB. Clocks may be asyn-  
chronous or coincident  
Features  
• High-speed, low-power, unidirectional, first-in first-out  
(FIFO) memories w/bus matching capabilities  
• CY standard or First-Word Fall-Through modes  
• 64K x 80 (CY7C4808V25)  
• 16K x 80 (CY7C4806V25)  
• 4K x 80 (CY7C4804V25)  
• 2.5V ± 125 mV power supply  
• Serial and parallel programming of Almost Empty/Full  
flags, each with 3 default values (8, 16, 64)  
• Master and Partial reset capability  
• Retransmit capability  
• Fabricated using Cypress 0.21-micron CMOS Technol-  
ogy for optimum speed/power  
• Individual clock frequency up to 200 MHz (5 ns  
read/write cycle times)  
• All I/Os are 1.5V HSTL  
• Big or Little Endian format on Port B  
• 288FBGA 19 mmx 19 mm(1.0-mmball pitch)packaging  
• Width and depth expansion capability  
• High-speed access with tA = 3.5  
Preliminary Top Level Block Diagram  
MBF  
CLKA  
CSA  
IM  
CLKB  
Port A  
Control  
Logic  
MailBox  
Register  
CSB  
ENA  
ENB  
Port B  
Control  
Logic  
MBA  
MBB  
BE/FWFT  
SIZE1A  
SIZE2A  
4K/16K/64K  
x80  
SIZE1B  
SIZE2B  
RT/SPM  
OE  
Dual Ported  
Memory  
80  
Read  
Pointer  
Write  
Pointer  
A79–0  
80  
B79–0  
4K/16K/64K  
x80  
Dual Ported  
Memory  
FIFO  
Reset  
Logic  
MRS  
PRS  
Status  
FF/IR  
AF  
Flag Logic  
EF/OR  
AE  
TDO  
Programmable Flag  
Offset Registers  
FS0/SD  
FS1/SEN  
JTAG/BIST Controller  
TDI  
TCK  
TMS TRST  
For the most recent information, visit the Cypress web site at www.cypress.com  
Cypress Semiconductor Corporation 3901 North First Street San Jose CA 95134  
408-943-2600  
December 16, 1999  

与CY7C4806V25-166C相关器件

型号 品牌 获取价格 描述 数据表
CY7C4806V25-200C CYPRESS

获取价格

FIFO, 16KX80, 3.5ns, Synchronous, CMOS, PBGA288, 19 X 19 MM, 1 MM PITCH, FBGA-288
CY7C4808V25-166BBC CYPRESS

获取价格

FIFO, 64KX80, 4ns, Synchronous, CMOS, PBGA288, 19 X 19 MM, 1 MM PITCH, BGA-288
CY7C4808V25-200BBI CYPRESS

获取价格

FIFO, 64KX80, 3.8ns, Synchronous, CMOS, PBGA288, 19 X 19 MM, 1 MM PITCH, BGA-288
CY7C4808V25-200C CYPRESS

获取价格

FIFO, 64KX80, 3.5ns, Synchronous, CMOS, PBGA288, 19 X 19 MM, 1 MM PITCH, FBGA-288
CY7C4811 CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs
CY7C4811-10AC CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs
CY7C4811-10AI CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs
CY7C4811-15AC CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs
CY7C4811-15AI CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs
CY7C4811-25AC CYPRESS

获取价格

256/512/1K/2K/4K/8K x9 x2 Double Sync FIFOs