5秒后页面跳转
CY7C43686AV-10AC PDF预览

CY7C43686AV-10AC

更新时间: 2024-11-23 22:05:59
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 先进先出芯片
页数 文件大小 规格书
40页 645K
描述
3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO

CY7C43686AV-10AC 数据手册

 浏览型号CY7C43686AV-10AC的Datasheet PDF文件第2页浏览型号CY7C43686AV-10AC的Datasheet PDF文件第3页浏览型号CY7C43686AV-10AC的Datasheet PDF文件第4页浏览型号CY7C43686AV-10AC的Datasheet PDF文件第5页浏览型号CY7C43686AV-10AC的Datasheet PDF文件第6页浏览型号CY7C43686AV-10AC的Datasheet PDF文件第7页 
3686AV  
CY7C43646AV  
CY7C43666AV  
CY7C43686AV  
3.3V 1K/4K/16K x36/x18x2 Tri Bus FIFO  
• Fully asynchronous and simultaneous Read and Write  
operation permitted  
Features  
• 3.3V high-speed, low-power, First-In First-Out (FIFO)  
memories with three independent ports (one bidirec-  
tional ×36, and two unidirectional ×18)  
• 1K ×36/×18×2 (CY7C43646AV)  
• 4K ×36/×18×2 (CY7C43666AV)  
• 16K ×36/×18×2 (CY7C43686AV)  
• 0.25-micron CMOS for optimum speed/power  
• High-speed 133-MHz operation (7.5-ns Read/Write  
cycle times)  
• Low power  
— ICC= 60 mA  
— ISB= 10 mA  
• Mailbox bypass register for each FIFO  
• Parallel and serial programmable Almost Full and  
Almost Empty flags  
• Retransmit function  
• Standard or FWFT user-selectable mode  
• Partial and master reset  
• Big or Little Endian format for word or byte bus sizes  
• 128-pin TQFP packaging  
• Easily expandable in width and depth  
Logic Block Diagram  
MBF1  
CLKA  
Mail1  
Register  
CSA  
W/RA  
ENA  
MBA  
RT2  
Port A  
Control  
Logic  
B
1K/4K/16K  
× 36  
Dual Ported  
Memory  
(FIFO1)  
017  
CLKB  
RENB  
Port B  
Control  
CSB  
Logic  
SIZEB  
MBB  
RTI  
MRS1  
PRS1  
FIFO1,  
Mail1  
Reset  
Logic  
Write  
Pointer  
Read  
Pointer  
FFA/IRA  
AFA  
Status  
Flag Logic  
EFB/ORB  
AEB  
Common  
Port Logic  
(B and C)  
SPM  
FS0/SD  
FS1/SEN  
Timing  
Mode  
Programmable  
Flag Offset  
Registers  
BE/FWFT  
A
035  
Status  
Flag Logic  
FFC/IRC  
AFC  
EFA/ORA  
AEA  
FIFO2,  
Mail2  
Reset  
Logic  
MRS2  
PRS2  
1
Read  
Pointer  
Pointer  
1K/4K/16K  
C
017  
× 36  
Dual Ported  
Memory  
CLKC  
(FIFO2)  
Port C  
Control  
Logic  
WENC  
SIZEC  
MBC  
Mail2  
Register  
MBF2  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose  
CA 95134  
408-943-2600  
Document #: 38-06026 Rev. *C  
Revised December 26, 2002  

与CY7C43686AV-10AC相关器件

型号 品牌 获取价格 描述 数据表
CY7C43686AV-10AI CYPRESS

获取价格

3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO
CY7C43686AV-15AC CYPRESS

获取价格

3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO
CY7C43686AV-15AI CYPRESS

获取价格

暂无描述
CY7C43686AV-7AC CYPRESS

获取价格

3.3V 1K 4K 16K x 36 x 18 x 2 Tri Bus FIFO
CY7C439-25DC CYPRESS

获取价格

Bi-Directional FIFO, 2KX9, 25ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, CERDIP-28
CY7C439-25LC CYPRESS

获取价格

Bi-Directional FIFO, 2KX9, 25ns, Asynchronous, CMOS, CQCC32, CERAMIC, LCC-32
CY7C439-25VC CYPRESS

获取价格

Bi-Directional FIFO, 2KX9, 25ns, Asynchronous, CMOS, PDSO28, 0.300 INCH, PLASTIC, SOJ-28
CY7C439-25VCR CYPRESS

获取价格

暂无描述
CY7C439-25VCT CYPRESS

获取价格

FIFO, 2KX9, 25ns, Asynchronous, CMOS, PDSO28, PLASTIC, SOJ-28
CY7C439-30DC CYPRESS

获取价格

Bi-Directional FIFO, 2KX9, 30ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, CERDIP-28