Datasheet > CY7C344B-15PI

CY7C344B-15PI

更新时间： 2024-11-23 23:45:43

品牌	Logo	应用领域
其他 - ETC		可编程逻辑光电二极管输入元件时钟
页数	文件大小	规格书
12页	283K
描述
UV-Erasable/OTP PLD

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中文翻译

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CY7C344B-15PI 数据手册

44B

CY7C344B

32-Macrocell MAX® EPLD

densest EPLD of this size. Eight dedicated inputs and 16 bidi-

rectional I/O pins communicate to one logic array block. In the

CY7C344B LAB there are 32 macrocells and 64 expander

product terms. When an I/O macrocell is used as an input, two

expanders are used to create an input path. Even if all of the

I/O pins are driven by macrocell registers, there are still 16

“buried” registers available. All inputs, macrocells, and I/O pins

are interconnected within the LAB.

Features

• High-performance, high-density replacement for TTL,

74HC, and custom logic

• 32 macrocells, 64 expander product terms in one LAB

• 8 dedicated inputs, 16 I/O pins

• Advanced 0.65-micron CMOS EPROM technology to

increase performance

The speed and density of the CY7C344B makes it a natural for

all types of applications. With just this one device, the designer

can implement complex state machines, registered logic, and

combinatorial “glue” logic, without using multiple chips. This

architectural flexibility allows the CY7C344B to replace multi-

chip TTL solutions, whether they are synchronous, asynchro-

nous, combinatorial, or all three.

• 28-pin, 300-mil DIP, cerDIP or 28-pin HLCC, PLCC

package

Functional Description

Available in a 28-pin, 300-mil DIP or windowed J-leaded ce-

ramic chip carrier (HLCC), the CY7C344B represents the

Logic Block Diagram^[1]

Pin Configurations

HLCC

Top View

15(22) INPUT

15(23) INPUT

INPUT

1(8)

INPUT/CLK 2(9)

27(6)

28(7)

INPUT

13(20)

14(21)

28 27 26

I/O

INPUT

INPUT/CLK

I/O

MACROCELL 2

MACROCELL 1

I/O 3(10)

I/O 4(11)

I/O 5(12)

I/O 6(13)

I/O 9(16)

I/O 10(17)

I/O 11(18)

I/O 12(19)

I/O 17(24)

I/O 18(25)

I/O 19(26)

I/O 20(27)

I/O 23(2)

I/O 24(3)

I/O 25(4)

I/O 26(5)

INPUT

I/O

MACROCELL 4

MACROCELL 6

MACROCELL 8

MACROCELL 10

MACROCELL 12

MACROCELL 14

MACROCELL 16

MACROCELL 18

MACROCELL 20

MACROCELL 22

MACROCELL 24

MACROCELL 26

MACROCELL 28

MACROCELL 30

MACROCELL 32

MACROCELL 3

MACROCELL 5

MACROCELL 7

MACROCELL 9

MACROCELL 11

MACROCELL 13

MACROCELL 15

MACROCELL 17

MACROCELL 19

MACROCELL 21

MACROCELL 23

MACROCELL 25

MACROCELL 27

MACROCELL 29

MACROCELL 31

I/O

12 13 14 1516 1718

C344B–2

CerDIP

Top View

INPUT

INPUT/CLK

I/O

INPUT

I/O

C344B–1

64 EXPANDER PRODUCT TERM ARRAY

GND

I/O

GND

I/O

INPUT

I/O

INPUT

C344B–3

Selection Guide

7C344B-15

7C344B-20

7C344B-25

Maximum Access Time (ns)

Note:

1. Number in () refers to J-leaded packages.

MAX is a registered trademark of Altera Corporation.

Cypress Semiconductor Corporation

•

3901 North First Street

•

San Jose

•

CA 95134

•

408-943-2600

Document #: 38-03036 Rev. **

Revised December 8, 1999

12 3 4 5 6 7...12

中文翻译

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与CY7C344B-15PI相关器件

型号	品牌	获取价格	描述	数据表
CY7C344B-15WC	ETC	获取价格	UV-Erasable/OTP PLD
CY7C344B-15WC/WI	CYPRESS	获取价格	32-Macrocell MAX㈢ EPLD
CY7C344B-15WI	ETC	获取价格	UV-Erasable/OTP PLD
CY7C344B-15WMB	CYPRESS	获取价格	32-Macrocell MAX㈢ EPLD
CY7C344B-20HC	ETC	获取价格	UV-Erasable/OTP PLD
CY7C344B-20HC/HI	CYPRESS	获取价格	32-Macrocell MAX㈢ EPLD
CY7C344B-20HI	ETC	获取价格	UV-Erasable/OTP PLD
CY7C344B-20HMB	CYPRESS	获取价格	32-Macrocell MAX㈢ EPLD
CY7C344B-20JC	ETC	获取价格	UV-Erasable/OTP PLD
CY7C344B-20JC/JI	CYPRESS	获取价格	32-Macrocell MAX㈢ EPLD

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