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CY7C245A-25TMB PDF预览

CY7C245A-25TMB

更新时间： 2024-11-23 23:45:39
品牌 Logo 应用领域
其他 - ETC 内存集成电路输出元件可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
13页 423K
描述
EPROM|2KX8|CMOS|FP|24PIN|CERAMIC

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CY7C245A-25TMB 数据手册

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45A  
CY7C245A  
2K x 8 Reprogrammable Registered PROM  
Functional Description  
Features  
• Windowed for reprogrammability  
• CMOS for optimum speed/power  
The CY7C245A is a high-performance, 2K x 8, electrically pro-  
grammable, read only memory packaged in a slim 300-mil  
plastic or hermetic DIP. The ceramic package may be  
equipped with an erasure window; when exposed to UV light  
the PROM is erased and can then be reprogrammed. The  
memory cells utilize proven EPROM floating-gate technology  
and byte-wide intelligent programming algorithms.  
• High speed  
— 15-ns address set-up  
— 10-ns clock to output  
• Low power  
The CY7C245A replaces bipolar devices and offers the advan-  
tages of lower power, reprogrammability, superior perfor-  
mance and high programming yield. The EPROM cell requires  
only 12.5V for the supervoltage, and low current requirements  
allow gang programming. The EPROM cells allow each mem-  
ory location to be tested 100%, because each location is writ-  
ten into, erased, and repeatedly exercised prior to encapsula-  
tion. Each PROM is also tested for AC performance to  
guarantee that after customer programming the product will  
meet AC specification limits.  
— 330 mW (commercial) for -25 ns  
— 660 mW (military)  
• Programmable synchronous or asynchronous output  
enable  
• On-chip edge-triggered registers  
• Programmable asynchronous register (INIT)  
• EPROM technology, 100% programmable  
• Slim, 300-mil, 24-pin plastic or hermetic DIP  
• 5V ±10% VCC, commercial and military  
• TTL-compatible I/O  
The CY7C245A has an asynchronous initialize function (INIT).  
This function acts as a 2049th 8-bit word loaded into the on-chip  
register. It is user programmable with any desired word, or may be  
used as a PRESET or CLEAR function on the outputs. INIT is trig-  
gered by a low level, not an edge.  
• Direct replacement for bipolar PROMs  
• Capable of withstanding greater than 2001V static dis-  
charge  
PinConfigurations  
Logic Block Diagram  
DIP  
Top View  
INIT  
1
24  
23  
22  
21  
A
A
6
V
CC  
7
2
3
A
8
O
7
A
0
A
A
5
9
4
A
4
A
1
A
10  
O
6
5
6
A
20  
19  
18  
17  
16  
3
INIT  
E/E  
S
A
2
PROGRAMMABLE  
ARRAY  
ROW  
A
MULTIPLEXER  
2
A
3
ADDRESS  
O
5
A
1
7
8
9
CP  
O
7
O
6
A
4
8-BIT  
A
0
EDGE-  
A
O
4
5
O
0
TRIGGERED  
REGISTER  
ADDRESS  
DECODER  
O
10  
11  
12  
O
5
1
A
6
15  
14  
13  
O
O
4
2
O
3
A
7
GND  
O
3
A
8
O
2
LCC/PLCC (Opaque only)  
Top View  
A
9
COLUMN  
ADDRESS  
O
1
A
10  
4 3 2 1 282726  
A
10  
O
0
25  
24  
23  
22  
21  
20  
19  
A
5
CP  
4
A
INIT  
3
PROGRAMMABLE  
MULTIPLEXER  
6
A
2
7
E/E  
S
E/E  
D
C
Q
S
A
1
8
CP  
NC  
A
0
9
CP  
NC  
O
7
10  
11  
O
0
O
6
131415161718  
12  
Selection Guide  
7C245A-25  
7C245A-35  
7C245A-45  
7C245A-15  
7C245A-18 7C245AL-25 7C245AL-35 7C245AL-45  
Minimum Address Set-Up Time (ns)  
Maximum Clock to Output (ns)  
15  
10  
18  
12  
25  
12  
35  
15  
45  
25  
Maximum Operating Standard Commercial  
120  
120  
120  
90  
90  
90  
Current (mA)  
Military  
120  
60  
120  
60  
120  
60  
L
Commercial  
Cypress Semiconductor Corporation  
Document #: 38-04007 Rev. **  
•
3901 North First Street  
•
San Jose  
•
CA 95134  
•
408-943-2600  
Revised March 4, 2002  
1234567...13

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