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CY74FCT191CTQCT PDF预览

CY74FCT191CTQCT

更新时间: 2024-11-10 22:38:39
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
6页 63K
描述
4-Bit Up/Down Binary Counter

CY74FCT191CTQCT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:QSOP-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:5.46Is Samacsys:N
其他特性:TCO OUTPUT计数方向:BIDIRECTIONAL
系列:FCTJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:4.9 mm
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER最大频率@ Nom-Sup:125000000 Hz
最大I(ol):0.064 A工作模式:SYNCHRONOUS
湿度敏感等级:2位数:4
功能数量:1端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
输出特性:3-STATE封装主体材料:PLASTIC/EPOXY
封装代码:SSOP封装等效代码:SSOP16,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, SHRINK PITCH
包装方法:TR峰值回流温度(摄氏度):260
电源:5 V最大电源电流(ICC):0.2 mA
Prop。Delay @ Nom-Sup:9.4 ns传播延迟(tpd):6.2 ns
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Counter最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.64 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
触发器类型:POSITIVE EDGE宽度:3.9 mm
Base Number Matches:1

CY74FCT191CTQCT 数据手册

 浏览型号CY74FCT191CTQCT的Datasheet PDF文件第2页浏览型号CY74FCT191CTQCT的Datasheet PDF文件第3页浏览型号CY74FCT191CTQCT的Datasheet PDF文件第4页浏览型号CY74FCT191CTQCT的Datasheet PDF文件第5页浏览型号CY74FCT191CTQCT的Datasheet PDF文件第6页 
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT191T  
SCCS016 - May 1994 - Revised February 2000  
4-Bit Up/Down Binary Counter  
Features  
Functional Description  
• Function, pinout, and drive compatible with FCT and F  
logic  
• FCT-C speed at 6.2 ns max,  
FCT-A speed at 7.8 ns max.  
• Reduced VOH (typically = 3.3V) versions of equivalent  
FCT functions  
• Edge-rate control circuitry for significantly improved  
noise characteristics  
The FCT191T is a reversible modulo-16 binary counter,  
featuring synchronous counting and asynchronous presetting.  
The preset allows the FCT191T to be used in programmable  
dividers. The count enable input, terminal count output, and ripple  
clock output make possible a variety of methods of implementing  
multiusage counters. In the counting modes, state changes are  
initiated by the rising edge of the clock.  
The outputs are designed with a power-off disable feature to  
allow for live insertion of boards.  
• Power-off disable permits live insertion  
• ESD > 2000V  
Matched rise and fall times  
• Sink current  
Source current  
64 mA  
32 mA  
Logic Block Diagram  
Pin Configurations  
CP U/D  
P
0
CE  
P
1
P
2
P
3
PL  
SOIC/QSOP  
Top View  
P
1
1
V
CC  
16  
Q
Q
1
0
2
3
4
5
6
15  
14  
13  
12  
P
0
CP  
RC  
TC  
PL  
CE  
U/D  
Q
Q
2
11  
10  
9
3
P
2
7
8
GND  
P
3
J
K
J
K
J
K
J
K
CLOCK  
CLOCK  
PRESET  
CLOCK  
PRESET  
CLOCK  
PRESET  
PRESET  
CLEAR  
Q
CLEAR  
Q
CLEAR  
Q
CLEAR  
Q
Q
Q
Q
Q
RC TC  
Q
0
Q
1
Q
2
Q
3
Pin Description  
Name  
RC Function Table[1]  
Description  
Inputs  
Outputs  
CE  
CP  
P
Count Enable Input (Active LOW)  
CE  
CP  
T[2]  
RC  
Clock Pulse Input (Active Rising Edge)  
Parallel Data Inputs  
L
H
X
H
X
L
X
X
H
H
PL  
U/D  
Q
Asynchronous Parallel Load Input (Active LOW)  
Up/Down Count Control Input  
Flip-Flop Outputs  
RC  
TC  
Ripple Clock Output (Active LOW)  
Terminal Count Output  
Copyright © 2000, Texas Instruments Incorporated  

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