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CY22800FXC-026A PDF预览

CY22800FXC-026A

更新时间: 2024-11-25 14:49:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
10页 201K
描述
Video Clock Generator, 27MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, MS-012, SOIC-8

CY22800FXC-026A 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:SOIC包装说明:0.150 INCH, LEAD FREE, MS-012, SOIC-8
针数:8Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.73JESD-30 代码:R-PDSO-G8
JESD-609代码:e3长度:4.889 mm
湿度敏感等级:3端子数量:8
最高工作温度:70 °C最低工作温度:
最大输出时钟频率:27 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
主时钟/晶体标称频率:27 MHz认证状态:Not Qualified
座面最大高度:1.727 mm最大供电电压:3.47 V
最小供电电压:3.14 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.8985 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, VIDEO
Base Number Matches:1

CY22800FXC-026A 数据手册

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CY22800  
Universal Programmable Clock Generator  
(UPCG)  
Features  
Benefits  
Spread Spectrum, VCXO, and Frequency Select  
Inventory of only one device, CY22800, is needed in various  
applications such as HDTV, STB, DVDR, and so on.  
Input frequency range:  
Crystal: 8–30 MHz  
CLKIN: 0.5–100 MHz  
Multiple predefined configurations that can be programmed  
into a single chip.  
Eliminates the need for expensive and difficult to use  
higher-order crystal.  
Output frequency:  
Commercial: 1–200 MHz  
Industrial: 1–166 MHz  
High-performance PLL tailored for multiple applications.  
Meets critical timing requirements in complex system designs.  
Enables application compatibility.  
Integrated phase-locked loop  
Low jitter, high accuracy outputs  
3.3V operation  
Allows up to three different frequency selects.  
8-pin SOIC package  
Logic Block Diagram  
CLKC  
XIN/CLKIN  
OSC  
Q
Φ
OUTPUT  
DIVIDER  
XOUT  
VCO  
CLKB  
CLKA  
VCXO  
FS2  
P
PLL  
FS1  
FS0  
(with modulation control)  
VSS  
VDD  
Pin Configuration  
Figure 1. CY22800 8-Pin SOIC  
XOUT  
1
2
3
4
XIN/CLKIN  
8
7
6
5
CLKC/FS2/VSS  
CLKA/FS0  
VDD  
FS0/VCXO  
VSS  
CLKB/FS1  
Table 1. Pin Definition  
Name  
Pin Number Description  
XIN  
1
Reference Input; Crystal or External Clock  
VDD  
2
3
4
5
6
7
8
3.3V Voltage Supply  
FS0/VCXO  
VSS  
Frequency Select 0/VCXO Analog Control Voltage[1]  
Ground  
Clock Output B/Frequency Select 1[1]  
Clock Output A/Frequency Select 0[1]  
Clock Output C/Frequency Select 2/VSS[1]  
Reference Output (No Connect when the reference is a clock)  
CLKB/FS1  
CLKA/FS0  
CLKC/FS2/VSS  
XOUT  
Note  
1. Pin definition changes for different configurations. Refer to the specific one-page data sheet for more details.  
Cypress Semiconductor Corporation  
Document #: 001-07704 Rev. *B  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised May 25, 2008  
[+] Feedback  

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