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CY22392FSXIT

更新时间: 2024-12-01 12:27:51
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟发生器闪存
页数 文件大小 规格书
13页 504K
描述
Three-PLL General Purpose Flash Programmable Clock Generator

CY22392FSXIT 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:SOP,Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.29JESD-30 代码:R-PDSO-G16
JESD-609代码:e3长度:9.893 mm
湿度敏感等级:3端子数量:16
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:166.6 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
主时钟/晶体标称频率:150 MHz座面最大高度:1.727 mm
最大供电电压:3.465 V最小供电电压:3.135 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:MATTE TIN (800)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:40宽度:3.8985 mm
uPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHERBase Number Matches:1

CY22392FSXIT 数据手册

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CY22392  
Three-PLL General Purpose  
Flash Programmable Clock Generator  
Three-PLL General Purpose FLASH Programmable Clock Generator  
Improves frequency accuracy over temperature, age, process,  
and initial offset.  
Features  
Three Integrated Phase-locked Loops  
Nonvolatile programming enables easy customization, fast  
turnaround, performance tweaking, design timing margin  
testing, inventory control, lower part count, and more secure  
product supply. In addition, any part in the family can also be  
programmed multiple times, which reduces programming  
errors and provides an easy upgrade path for existing designs.  
Ultra Wide Divide Counters (8-bit Q, 11-bit P, and 7-bit Post  
Divide)  
Improved Linear Crystal Load Capacitors  
Flash Programmability  
In-house programming of samples and prototype quantities is  
available using the CY3672 development kit. Production  
quantities are available through Cypress Semiconductor’s  
value added distribution partners or by using third party  
programmers from BP Microsystems, HiLo Systems, and  
others.  
Field Programmable  
Low-jitter, High-accuracy Outputs  
Power Management Options (Shutdown, OE, Suspend)  
Configurable Crystal Drive Strength  
Frequency Select through three External LVTTL Inputs  
3.3 V Operation  
Performance  
suitable  
for  
high-end  
multimedia,  
communications, industrial, A/D Converters, and consumer  
applications.  
16-pin TSSOP and SOIC Packages  
CyClocksRT™ Support  
Supports numerous low power application schemes and  
reduces EMI by enabling unused outputs to be turned off.  
Adjusts crystal drive strength for compatibility with virtually all  
crystals.  
Benefits  
Generates up to three unique frequencies on six outputs up to  
200 MHz from an external source. Functional upgrade for  
current CY2292 family.  
3-bit external frequency select options for PLL1, CLKA, and  
CLKB.  
Industry-standard supply voltage.  
Enables  
0 ppm frequency generation and frequency  
Industry-standard packaging saves on board space.  
Easy to use software support for design entry.  
conversion under the most demanding applications.  
Logic Block Diagram  
XTALIN  
XBUF  
OSC.  
XTALOUT  
CONFIGURATION  
FLASH  
PLL1  
Divider  
/2,3, or 4  
CLKE  
11 BIT P  
8 BIT Q  
SHUTDOWN/OE  
S0  
S1  
PLL2  
Divider  
7 BIT  
CLKD  
CLKC  
4x4  
Crosspoint  
Switch  
11 BIT P  
8 BIT Q  
S2/SUSPEND  
Divider  
7 BIT  
PLL3  
11 BIT P  
8 BIT Q  
Divider  
7 BIT  
CLKB  
CLKA  
Divider  
7 BIT  
Cypress Semiconductor Corporation  
Document Number: 38-07013 Rev. *I  
198 Champion Court  
San Jose, CA 95134-1709  
408-943-2600  
Revised January 24, 2013  

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