CY22392
Three-PLL General Purpose
Flash-Programmable Clock Generator
Three-PLL General Purpose Flash-Programmable Clock Generator
■ Improves frequency accuracy over temperature, age, process,
and initial offset.
Features
■ Three Integrated Phase-locked Loops
■ Nonvolatile programming enables easy customization, fast
turnaround, performance tweaking, design timing margin
testing, inventory control, lower part count, and more secure
product supply. In addition, any part in the family can also be
programmed multiple times, which reduces programming
errors and provides an easy upgrade path for existing designs.
■ Ultra Wide Divide Counters (8-bit Q, 11-bit P, and 7-bit Post
Divide)
■ Improved Linear Crystal Load Capacitors
■ Flash Programmability
■ In-house programming of samples and prototype quantities is
available using the CY3672 development kit. Production
quantities are available through Cypress Semiconductor’s
value added distribution partners or by using third party
programmers from BP Microsystems, HiLo Systems, and
others.
■ Field-Programmable
■ Low-jitter, High-accuracy Outputs
■ Power Management Options (Shutdown, OE, Suspend)
■ Configurable Crystal Drive Strength
■ Frequency Select through three External LVTTL Inputs
■ 3.3 V Operation
■ Performance
suitable
for
high-end
multimedia,
communications, industrial, A/D Converters, and consumer
applications.
■ 16-pin TSSOP and SOIC Packages
■ CyClocksRT™ Support
■ Supports numerous low power application schemes and
reduces EMI by enabling unused outputs to be turned off.
■ Adjusts crystal drive strength for compatibility with virtually all
crystals.3-bitexternalfrequencyselectoptionsforPLL1, CLKA,
and CLKB.
Benefits
■ Generates up to three unique frequencies on six outputs up to
200 MHz from an external source. Functional upgrade for
current CY2292 family.
■ Industry-standard supply voltage.Industry-standard packaging
saves on board space.Easy to use software support for design
entry.
■ Enables
0 ppm frequency generation and frequency
conversion under the most demanding applications.
Functional Description
For a complete list of related documentation, click here.
Logic Block Diagram
XTALIN
XBUF
OSC.
XTALOUT
CONFIGURATION
FLASH
PLL1
Divider
/2,3, or 4
CLKE
11 BIT P
8 BIT Q
SHUTDOWN/OE
S0
S1
PLL2
Divider
7 BIT
CLKD
CLKC
4x4
Crosspoint
Switch
11 BIT P
8 BIT Q
S2/SUSPEND
Divider
7 BIT
PLL3
11 BIT P
8 BIT Q
Divider
7 BIT
CLKB
CLKA
Divider
7 BIT
Cypress Semiconductor Corporation
Document Number: 38-07013 Rev. *M
•
198 Champion Court
•
San Jose, CA 95134-1709
•
408-943-2600
Revised February 2, 2018