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CY22381SXI-196 PDF预览

CY22381SXI-196

更新时间: 2024-12-01 14:50:27
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 时钟光电二极管外围集成电路晶体
页数 文件大小 规格书
8页 163K
描述
Clock Generator, 166MHz, CMOS, PDSO8, 0.150 INCH, LEAD FREE, MS-012, SOIC-8

CY22381SXI-196 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP,针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.76
Is Samacsys:NJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.889 mm
湿度敏感等级:3端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
最大输出时钟频率:166 MHz封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
主时钟/晶体标称频率:150 MHz认证状态:Not Qualified
座面最大高度:1.7272 mm最大供电电压:3.465 V
最小供电电压:3.135 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL处于峰值回流温度下的最长时间:30
宽度:3.8985 mmuPs/uCs/外围集成电路类型:CLOCK GENERATOR, OTHER
Base Number Matches:1

CY22381SXI-196 数据手册

 浏览型号CY22381SXI-196的Datasheet PDF文件第2页浏览型号CY22381SXI-196的Datasheet PDF文件第3页浏览型号CY22381SXI-196的Datasheet PDF文件第4页浏览型号CY22381SXI-196的Datasheet PDF文件第5页浏览型号CY22381SXI-196的Datasheet PDF文件第6页浏览型号CY22381SXI-196的Datasheet PDF文件第7页 
CY22381  
Three-PLL General Purpose FLASH  
Programmable Clock Generator  
• Non-volatile programming enables easy customi-  
zation, ultra-fast turnaround, performance tweaking,  
design timing margin testing, inventory control, lower  
part count, and more secure product supply. Can also  
Features  
• Three integrated phase-locked loops  
• Ultra-widedividecounters(eight-bitQ,eleven-bitP,and  
be programmed multiple times which reduces  
programming errors and provides an easy upgrade  
path for existing designs  
seven-bit post divide)  
• Improved linear crystal load capacitors  
• Flash programmability  
• In-house programming of samples and prototype  
quantities is available using the CY3672 FTG devel-  
opmentKit.Productionquantitiesareavailablethrough  
Cypress’s value-added distribution partners or by  
using third party programmers from BP Microsystems,  
HiLo Systems, and others.  
• Performance suitable for high-endmultimedia, commu-  
nications, industrial, A/D converters, and consumer  
applications  
• Field programmability  
• Low-jitter, high-accuracy outputs  
• Power-management options (Shutdown, OE, Suspend)  
• Configurable crystal drive strength  
• Frequency select option via external LVTTL Input  
• 3.3V operation  
• Eight-pin SOIC package  
• CyClocks RT™ support  
• Supports numerous low-power application schemes  
and reduces EMI by allowing unused outputs to be  
turned off  
• Adjust crystal drive strength for compatibility with  
Benefits  
virtually all crystals  
• External frequency select option for PLL1, CLKA, and  
CLKB  
• Industry standard supply voltage  
• Industry standard packaging saves on board space  
• Easy-to-use software support for design entry  
• Generates up to three unique frequencies on three  
outputs up to 200 MHz from an external source.  
Functional upgrade for current CY2081 family.  
• Allows for 0 ppm frequency generation and frequency  
conversion under the most demanding applications  
• Improves frequency accuracy over temperature, age,  
process, and initial offset  
Logic Block Diagram  
XTALIN  
OSC.  
XTALOUT  
PLL1  
Divider  
CLKC  
7-BIT  
11-BIT P  
CONFIGURATION  
FLASH  
8-BIT Q  
4 × 3  
PLL2  
11-BIT P  
8-BIT Q  
Crosspoint  
Switch  
Divider  
7-BIT  
CLKB  
CLKA  
SHUTDOWN/OE  
FS/SUSPEND  
PLL3  
11-BIT P  
8-BIT Q  
Divider  
7-BIT  
Cypress Semiconductor Corporation  
3901 North First Street  
San Jose, CA 95134  
408-943-2600  
Document #: 38-07012 Rev. *D  
Revised October 13, 2004  

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