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CXD2951GA-1 PDF预览

CXD2951GA-1

更新时间: 2024-02-03 20:11:49
品牌 Logo 应用领域
索尼 - SONY 电信电信集成电路
页数 文件大小 规格书
20页 211K
描述
Telecom Circuit, 1-Func, CMOS, PBGA176, 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LFLGA-176

CXD2951GA-1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:LGA
包装说明:LFLGA,针数:176
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.64JESD-30 代码:S-PBGA-B176
JESD-609代码:e4长度:12 mm
功能数量:1端子数量:176
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:LFLGA
封装形状:SQUARE封装形式:GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
座面最大高度:1.3 mm标称供电电压:1.8 V
表面贴装:YES技术:CMOS
电信集成电路类型:TELECOM CIRCUIT温度等级:INDUSTRIAL
端子面层:GOLD端子形式:BUTT
端子节距:0.5 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:10宽度:12 mm
Base Number Matches:1

CXD2951GA-1 数据手册

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CXD2951GA-1  
Performance  
Baseband  
Tracking sensitivity:  
–152dBm (average) or less  
Acquisition sensitivity: –139dBm (average) or less  
Reference data using the Sony's reference board when using both an antenna of 25dBi gain and a RF  
amplifier with NF 2dB, 25dB gain.  
TTFF (Time to First Fix):  
Time until initial position measurement after power-on with the following conditions:  
Cold Start (without both ephemeris and almanac time): 50s (average) / 60s (95% possibility)  
Warm Start (without ephemeris but with almanac time): 35s (average) / 40s (95% possibility)  
Hot Start (with both ephemeris and almanac time): 2s (minimum) / 6s (95% possibility)  
Reference data with elevation angle of 5° or more and no interception environment with satellite powers  
–130dBm.  
Note) "95% possibility" means "position time with 95% possibility".  
Positioning accuracy:  
2DRMS: approx. 5m  
Reference data with elevation angle of 5° or more and no interception environment with satellite powers  
–130dBm.  
Measurement data update time: 1s  
Power consumption:  
50mW (average) while position calculating with tracking satellites in low power mode  
120mW (average) while position calculating with acquiring and tracking satellites  
Reference data using the Sony's reference board when the reference clock input is 18.414MHz, and its  
amplitude is 3.3V swing.  
1PPS output  
1µs or less precision, 1PPS outputs from ECLKOUT (Pin 97).  
Note) These values are not guaranteed, depending on the conditions.  
Radio  
IF signal deviation: (= IF output – 1.023MHz)  
±125kHz  
Synthesizer phase noise (typ.):  
–70dBc/Hz (10kHz)  
–80dBc/Hz (100kHz)  
PLL spurious (typ.):  
–60dBc (inside fosc ±1.023MHz)  
–55dBc (outside fosc ±1.023MHz)  
Noise figure (typ.):  
4dB  
Note) These values are not guaranteed, depending on the conditions.  
– 2 –  

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