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CXD3008Q PDF预览

CXD3008Q

更新时间: 2024-01-03 04:13:31
品牌 Logo 应用领域
索尼 - SONY 消费电路商用集成电路数字信号处理器
页数 文件大小 规格书
131页 993K
描述
CD Digital Signal Processor with Built-in Digital Servo

CXD3008Q 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP, QFP80,.64SQ针数:80
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.83商用集成电路类型:CONSUMER CIRCUIT
JESD-30 代码:S-PQFP-G80长度:14 mm
功能数量:1端子数量:80
最高工作温度:75 °C最低工作温度:-20 °C
封装主体材料:PLASTIC/EPOXY封装代码:QFP
封装等效代码:QFP80,.64SQ封装形状:SQUARE
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified座面最大高度:1.85 mm
子类别:Other Consumer ICs最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):2.7 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL EXTENDED
端子形式:GULL WING端子节距:0.65 mm
端子位置:QUAD宽度:14 mm
Base Number Matches:1

CXD3008Q 数据手册

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CXD3008Q  
CD Digital Signal Processor with Built-in Digital Servo  
For the availability of this product, please contact the sales office.  
Description  
The CXD3008Q is a digital signal processor LSI for  
CD players. This LSI incorporates a digital servo.  
80 pin QFP (Plastic)  
Features  
All digital signal processings during playback are  
performed with a single chip  
Highly integrated mounting possible due to a built-  
in RAM  
Digital Signal Processor (DSP) Block  
Playback mode supporting CAV (Constant Angular  
Velocity)  
Frame jitter free  
Applications  
0.5× to 4× continuous playback possible  
Allows relative rotational velocity readout  
Wide capture range playback mode  
Spindle rotational velocity following method  
Supports 1× to 4× playback variable pitch  
playback  
Bit clock, which strobes the EFM signal, is  
generated by the digital PLL.  
EFM data demodulation  
Enhanced EFM frame sync signal protection  
Refined super strategy-based powerful error  
correction  
C1: double correction, C2: quadruple correction  
Supported during 4× playback  
Noise reduction during track jumps  
Auto zero-cross mute  
CD players  
Structure  
Silicon gate CMOS IC  
Absolute Maximum Ratings  
Supply voltage  
Input voltage  
VDD  
VI  
–0.3 to +7.0 V  
–0.3 to +7.0 V  
(VSS – 0.3 to VDD + 0.3) V  
VO  
Tstg  
Output voltage  
Storage temperature  
Supply voltage difference VSS – AVSS –0.3 to +0.3 V  
DD – AVDD –0.3 to +0.3 V  
–0.3 to +7.0 V  
–40 to +125 °C  
V
Recommended Operating Conditions  
2.7 to 5.5  
V
Supply voltage  
VDD  
Subcode demodulation and Sub-Q data error  
detection  
Digital spindle servo  
Operating temperature Topr  
Note) The VDD for the CXD3008Q varies according  
–20 to +75 °C  
to the playback speed.  
16-bit traverse counter  
Asymmetry correction circuit  
CPU interface on serial bus  
Error correction monitor signal, etc. output from a  
new CPU interface  
Servo auto sequencer  
Fine search performs track jumps with high  
accuracy  
Digital audio interface output  
Digital level meter, peak meter  
Bilingual supported  
VCO control mode  
CD TEXT data demodulation  
EFM playability reinforcement function  
VDD [V]  
Playback speed  
CD-DSP block  
4× speed  
2× speed  
1× speed  
4.75 to 5.25  
3.0 to 5.5  
2.7 to 5.5  
Input/Output Capacitance  
Input capacitance  
Output capacitance  
CI  
CO  
12 (Max.)  
12 (Max.)  
pF  
pF  
Note) Measurement conditions VDD = VI = 0V  
Digital Servo (DSSP) Block  
fM = 1MHz  
Microcomputer software-based flexible servo control  
Offset cancel function for servo error signal  
Auto gain control function for servo loop  
E:F balance, focus bias adjustment function  
Surf jump function supporting micro two-axis  
Tracking filter: 6 stages  
Focus filter: 5 stages  
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by  
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the  
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.  
– 1 –  
E98Z24A98-PS  

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