CXD3003

更新时间： 2024-02-19 05:01:01

品牌	Logo	应用领域
索尼 - SONY		数字信号处理器
页数	文件大小	规格书
137页	1348K
描述
CD Digital Signal Processor with Built-in Digital Servo and DAC

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技术参数
数据手册

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CXD3003 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP,	针数：	144
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.83	Is Samacsys：	N
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQFP-G144
长度：	20 mm	功能数量：	1
端子数量：	144	最高工作温度：	75 °C
最低工作温度：	-20 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, LOW PROFILE, FINE PITCH	认证状态：	Not Qualified
座面最大高度：	1.7 mm	最大供电电压 (Vsup)：	4 V
最小供电电压 (Vsup)：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	COMMERCIAL EXTENDED
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	20 mm
Base Number Matches：	1

CXD3003 数据手册

CXD3003R

CD Digital Signal Processor with Built-in Digital Servo and DAC

For the availability of this product, please contact the sales office.

Description

The CXD3003R is a digital signal processor LSI for

CD players. This LSI incorporates a digital servo,

digital filter and 1-bit DAC.

144 pin LQFP (Plastic)

Features

• All digital signal processing during playback is

performed with a single chip

• Highly integrated mounting possible due to a built-

in RAM

Digital Signal Processor (DSP) Block

• Playback mode supporting CAV (Constant Angular

Velocity)

• Frame jitter free

• 0.5× to 24× continuous playback possible with a

low external clock

• Allows relative rotational velocity readout

• Wide capture range playback mode

• Spindle rotational velocity following method

• Supports 1× to 24× playback by switching the built-

in VCO

• The bit clock, which strobes the EFM signal, is

generated by the digital PLL

• EFM data demodulation

• Enhanced EFM frame sync signal protection

• Refined super strategy-based powerful error

correction

C1: double correction, C2: quadruple correction

Supported during 24× playback

• Noise reduction during track jumps

• Auto zero-cross mute

• Subcode demodulation and Sub Q data error

detection

• Digital spindle servo (built-in oversampling filter)

• 16-bit traverse counter

• Asymmetry compensation circuit

• CPU interface on serial bus

• Error correction monitor signal, etc. output from a

new CPU interface

• Servo auto sequencer

• Fine search performs track jumps with high

accuracy

Digital Servo (DSSP) Block

• Microcomputer software-based flexible servo

control

• Offset cancel function for servo error signal

• Auto gain control function for servo loop

• E:F balance, focus bias adjustment function

• Surf jump function supporting micro two-axis

Digital Filter and DAC Blocks

• Digital de-emphasis

• Digital attenuation

• 4Fs oversampling filter

• Adoption of a secondary ∆∑ noise shaper

• Supports double-speed playback

Structure

Silicon gate CMOS IC

Absolute Maximum Ratings

• Supply voltage

• Input voltage

V^DD

–0.3 to +4.6

(VSS – 0.3V to VDD + 0.3V)

–0.3 to +4.6

–40 to +125 °C

• Output voltage

• Storage temperature Tstg

• Supply voltage difference

VSS – AVSS –0.3 to +0.3

VDD – AVDD –0.3 to +0.3

Recommended Operating Conditions

• Supply voltage

• Operating temperature

Topr

VDD

3.0 to 4.0

–20 to +75

°C

• Digital audio interface outputs

• Digital level meter, peak meter

• Bilingual compatible

The VDD (min.) for the CXD3003R varies

according to the playback speed and built-in VCO

selection. The VDD (min.) for the CXD3003R under

various conditions are as shown on the following

page.

• VCO control mode

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E97306A88

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