CXD3021R

更新时间： 2024-02-23 14:06:19

品牌	Logo	应用领域
索尼 - SONY		消费电路商用集成电路数字信号处理器
页数	文件大小	规格书
161页	1298K
描述
CD Digital Signal Processor with Built-in Digital Servo and DAC

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技术参数
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CXD3021R 技术参数

生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP, QFP120,.7SQ,20	针数：	120
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.82	Is Samacsys：	N
商用集成电路类型：	CONSUMER CIRCUIT	JESD-30 代码：	S-PQFP-G120
长度：	16 mm	功能数量：	1
端子数量：	120	最高工作温度：	75 °C
最低工作温度：	-20 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP120,.7SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
电源：	3.3 V	认证状态：	Not Qualified
座面最大高度：	1.7 mm	子类别：	Other Consumer ICs
最大供电电压 (Vsup)：	4 V	最小供电电压 (Vsup)：	3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL EXTENDED	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
宽度：	16 mm	Base Number Matches：	1

CXD3021R 数据手册

CXD3021R

CD Digital Signal Processor with Built-in Digital Servo and DAC

For the availability of this product, please contact the sales office.

Description

The CXD3021R is a digital signal processor LSI for

CD players. This LSI incorporates a digital servo,

digital filter and 1-bit DAC.

120 pin LQFP (Plastic)

Features

• All digital signal processing during playback is

performed with a single chip

• Highly integrated mounting possible due to a built-

in RAM

Digital Signal Processor (DSP) Block

• Playback mode supporting CAV (Constant Angular

Velocity)

• Frame jitter free

• 0.5× to 32× continuous playback possible with a

low external clock

• Allows relative rotational velocity readout

• Wide capture range playback mode

• Spindle rotational velocity following method

• Supports 1× to 32× playback by switching the

built-in VCO

• The bit clock, which strobes the EFM signal, is

generated by the digital PLL.

Digital Servo (DSSP) Block

• Microcomputer software-based flexible servo control

• Offset cancel function for servo error signal

• Auto gain control function for servo loop

• E:F balance, focus bias adjustment function

• Surf jump and surf brake functions supporting micro

two-axis

• Tracking filter: 6 stages

Focus filter: 5 stages

• Servo drive DAC output possible

• Digital PLL master clock can be set to 2/3 the

conventional one.

• EFM data demodulation

• Enhanced EFM frame sync signal protection

• Refined super strategy-based powerful error

correction

Digital Filter and DAC Blocks

• Digital de-emphasis

• Digital attenuation

• 8fs oversampling filter

• Adoption of a tertiary ∆∑ noise shaper

• Supports double-speed playback

C1: double correction, C2: quadruple correction

Supported during 32× playback

• Noise reduction during track jumps

• Auto zero-cross mute

Structure

Silicon gate CMOS IC

• Subcode demodulation and Sub-Q data error

detection

• Digital CLV spindle servo (built-in oversampling filter)

• 16-bit traverse counter

• Asymmetry correction circuit

• CPU interface on serial bus

• Error correction monitor signal, etc. output from a

new CPU interface

Absolute Maximum Ratings

• Supply voltage

• Input voltage

V^DD

–0.3 to +4.4 V

(VSS – 0.3 to VDD + 0.3) V

• Output voltage

• Storage temperature

V^O

Tstg

–0.3 to +4.4 V

–40 to +125 °C

•

Supply voltage difference VSS – AVSS –0.3 to +0.3 V

DD – AVDD –0.3 to +0.3 V

• Servo auto sequencer

• Fine search performs track jumps with high

accuracy

• Digital audio interface outputs

• Digital level meter, peak meter

• Bilingual compatible

• VCO control mode

• Digital Out can be generated from the audio serial

inputs.

Recommended Operating Conditions

• Supply voltage 3.0 to 4.0

• Operating temperature Topr –20 to +75 °C

The VDD (min.) for the CXD3021R varies according

to the playback speed and built-in VCO selection.

The VDD (min.) for the CXD3021R under various

conditions are as shown on the following page.

VDD

• Supports three types of DA interface

(48 bits/64 bits/32 bits)

• DSP, servo and DAC blocks support sleep mode.

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by

any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the

operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

– 1 –

E98209A9Z-PS

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与CXD3021R相关器件

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CXD3022R	SONY	Consumer Circuit, PQFP144, LQFP-144	获取价格
CXD3027	ETC	CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Lis	获取价格
CXD3027R	SONY	CD Digital Signal Processor with Built-in Digital Servo + Shock-Proof Memory Controller +	获取价格
CXD3027R-1	ETC	CD Audio Digital Signal-Processing LSI Device with On-Chip Digital Servo System Allows Lis	获取价格
CXD3029R	SONY	CD Digital Signal Processor with Built-in Digital Servo + Shock-proof Memory Controller +	获取价格
CXD3030	SONY	System-on-a-Chip (SoC) Device Supports 48ⅴ Sp	获取价格

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