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CWB201CP PDF预览

CWB201CP

更新时间: 2024-11-04 22:28:55
品牌 Logo 应用领域
CALOGIC 开关
页数 文件大小 规格书
5页 57K
描述
100MHz CMOS/DMOS Wideband Quad Analog Switch

CWB201CP 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:DIP
包装说明:PLASTIC, DIP-16针数:16
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.90.00.00风险等级:5.91
模拟集成电路 - 其他类型:SPSTJESD-30 代码:R-PDIP-T16
JESD-609代码:e0负电源电压最大值(Vsup):-15 V
负电源电压最小值(Vsup):-8 V标称负供电电压 (Vsup):-10 V
正常位置:NC信道数量:1
功能数量:4端子数量:16
标称断态隔离度:66 dB最大通态电阻 (Ron):160 Ω
最高工作温度:85 °C最低工作温度:
输出:SEPARATE OUTPUT封装主体材料:PLASTIC/EPOXY
封装代码:DIP封装等效代码:DIP16,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED电源:+-15 V
认证状态:Not Qualified子类别:Multiplexer or Switches
最大供电电压 (Vsup):15 V最小供电电压 (Vsup):8 V
标称供电电压 (Vsup):10 V表面贴装:NO
最长断开时间:300 ns最长接通时间:600 ns
切换:BREAK-BEFORE-MAKE技术:NMOS
温度等级:OTHER端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
Base Number Matches:1

CWB201CP 数据手册

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100MHz CMOS/DMOS  
Wideband Quad Analog Switch  
CORPORATION  
CWB201  
FEATURES  
DESCRIPTION  
Wide Bandwidth Switches . . . . . . . . 0.9 x DC @ 100MHz  
High OFF Isolation. . . . . . . . . . . . . . . . . 66 dB @ 100MHz  
Low Channel-to-Channel Crosstalk. . . -80 dB @ 10MHz  
TTL Compatible  
Low ON Resistance  
High Speed  
Low Capaciatance  
Designed for RF and Video Switching the CWB201 is  
manufactured using Calogic’s high speed CMOS combined  
with DMOS transistors in a monolithic design resulting in  
superior performance characteristics. This quad SPST switch  
array has extensive applications where high frequency video,  
audio or digital signals are switched or routed. The CWB201  
is TTL compatible which is of great benefit to to designs that  
require constant logic switching over a wide range of supply  
voltages and temperature without a separate power supply.  
APPLICATIONS  
Glitch-Free Analog Switches  
RF & Video Switches  
Track-and-Hold Switches  
Sample-and-Hold Switches  
ORDERING INFORMATION  
Part  
Package  
Temperature Range  
CWB201CP Plastic 16-Pin Dip  
0 to +85oC  
High Speed Data Routing  
CWB201CY Plastic SO-16 Surface Mount 0 to +85oC  
XCWB201  
Sorted Chips in Carriers  
0 to +85oC  
PIN CONFIGURATION  
FUNCTIONAL BLOCK DIAGRAM  
CWB201CP  
S
1
IN1  
D1  
1
2
3
4
5
6
7
8
16 IN2  
15 D2  
14 S2  
13 V+  
12 N/C  
11 S3  
10 D3  
IN  
IN  
IN  
IN  
1
2
3
4
D
S
1
2
S1  
D
S
V-  
2
3
GND  
S4  
D
S
3
4
D4  
IN4  
9
IN3  
D
4
TOP VIEW  
Four SPST Switches per Package.  
Switches shown in Logic '1' Input Position.  
CWB201CY  
LOGIC TABLE  
IN1  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
IN2  
D1  
S1  
D2  
S2  
Logic  
Switch  
Logic ’0’ 0.8V  
Logic ’1’ 2.42V  
0
1
ON  
V-  
V+  
N/C  
S3  
OFF  
GND  
S4  
NOTE: All devices contain diodes to protect inputs against  
damage due to high static voltages or electric fields;  
however, it is advised that precautions be taken not to  
exceed the maximum recommended input voltages. All  
unused inputs must be connected to an appropriate logic  
level (VDD or GND).  
D4  
D3  
IN3  
IN4  
TOP VIEW  
CWB  

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