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CR16MBR5VJE7Y PDF预览

CR16MBR5VJE7Y

更新时间: 2024-10-28 23:43:31
品牌 Logo 应用领域
其他 - ETC 微控制器
页数 文件大小 规格书
8页 104K
描述
Microcontroller

CR16MBR5VJE7Y 数据手册

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January 2001  
CR16MBR5 CompactRISC 16-Bit ROM Microcontroller  
1.0 General Description  
The CR16MBR5 CompactRISC™ microcontroller is a gen-  
eral-purpose 16-bit microcontroller based on a Reduced  
Instruction Set Computer (RISC) architecture. The device  
operates as a complete microcomputer with all system tim-  
ing, interrupt logic, ROM program memory, RAM, EE-  
PROM data memory, and I/O ports included on-chip. It is  
ideally suited to a wide range of embedded controller appli-  
cations because of its high performance, on-chip integrat-  
ed features and low power consumption resulting in  
decreased system cost.  
The CR16MBR5 offers the high performance of a RISC ar-  
chitecture while retaining the advantages of a traditional  
Complex Instruction Set Computer (CISC): compact code,  
on-chip memory and I/O, and reduced cost. The CPU uses  
a three-stage instruction pipeline that allows execution of  
up to one instruction per clock cycle, or up to 25 million in-  
structions per second (MIPS) at a clock rate of 25 MHz.  
The CR16MBR5 device contains a FullCAN class, CAN  
serial interface for low/high speed applications with 15 or-  
thogonal message buffers, each supporting standard as  
well as extended message identifiers.  
Block Diagram  
Fast Clk Slow Clk  
CR16B  
Processing  
Unit  
RISC Core  
CR16CAN  
FullCAN 2.0B  
Clock Generator  
Power-on-Reset  
Core Bus  
Bus  
Interface  
Unit  
Power  
Manage-  
ment  
32K-Byte  
ROM  
Memory  
Peripheral  
Interrupt  
Control  
2176-Byte  
Timing and  
Watchdog  
3k-Byte  
RAM  
Bus  
EEPROM  
Data  
Memory  
Controller  
Peripheral Bus  
2x  
USART  
2 Analog  
Comparators  
ACCESS  
bus  
4x  
VTU  
2x  
MFT  
12-ch  
8-bit A/D  
I/O  
MIWU  
µWire/SPI  
CompactRISC™ is a trademark of National Semiconductor Corporation.  
©2001 National Semiconductor Corporation  

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