February 2002
CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5
16-Bit Reprogrammable/ROM Microcontroller
1.0 General Description
The
CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5
taining the advantages of a traditional Complex Instruction
Set Computer (CISC): compact code, on-chip memory and
I/O, and reduced cost. The CPU uses a three-stage in-
struction pipeline that allows execution of up to one instruc-
tion per clock cycle, or up to 24 million instructions per
second (MIPS) at a clock rate of 24 MHz.
CompactRISC™ microcontroller are general-purpose 16-
bit microcontrollers based on a Reduced Instruction Set
Computer (RISC) architecture. The device operates as a
complete microcomputer with all system timing, interrupt
logic, flash program memory or ROM memory, RAM, EE-
PROM data memory, and I/O ports included on-chip. It is
ideally suited to a wide range of embedded controller appli-
cations because of its high performance, on-chip integrat-
ed features and low power consumption resulting in
decreased system cost.
The CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 de-
vices contain a FullCAN class, CAN serial interface for low/
high speed applications with 15 orthogonal message buff-
ers, each supporting standard as well as extended mes-
sage identifiers.
The CR16MCT9/CR16MCT5/CR16HCT9/CR16HCT5 of-
fer the high performance of a RISC architecture while re-
Block Diagram
Fast Clk Slow Clk
CR16B
Processing
Unit
RISC Core
CR16CAN
FullCAN 2.0B
Clock Generator
Power-on-Reset
Core Bus
Bus
Interface
Unit
96k-Byte
Flash
Program
Memory
1.5k-Byte
ISP
Memory
Power
Manage-
ment
Peripheral
Bus
Controller
Interrupt
Control
2176-Byte
Timing and
Watchdog
4k-Byte
RAM
EEPROM
Data
Memory
Peripheral Bus
2x
USART
2 Analog
Comparators
ACCESS
bus
4x
VTU
2x
MFT
12-ch
8-bit A/D
I/O
µ
MIWU
Wire/SPI
Note: Not all peripherals shown above will be contained in any device.
©2002 National Semiconductor Corporation
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