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CR16HCS5VJE7XXX

更新时间： 2024-10-29 20:51:39
品牌 Logo 应用领域
美国国家半导体 - NSC 微控制器
页数 文件大小 规格书
156页 708K
描述
IC,MICROCONTROLLER,16-BIT,CR16B CPU,CMOS,QFP,80PIN,PLASTIC

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中文翻译

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CR16HCS5VJE7XXX 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
Reach Compliance Code：not_compliant风险等级：5.92
位大小：16CPU系列：CR16B
JESD-30 代码：S-PQFP-G80JESD-609代码：e0
湿度敏感等级：2A端子数量：80
最高工作温度：125 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：QFP
封装等效代码：QFP80,.68SQ封装形状：SQUARE
封装形式：FLATPACK电源：5 V
认证状态：Not QualifiedRAM（字节）：3072
ROM（单词）：32768ROM可编程性：MROM
速度：24 MHz子类别：Microcontrollers
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：AUTOMOTIVE
端子面层：Tin/Lead (Sn85Pb15)端子形式：GULL WING
端子节距：0.635 mm端子位置：QUAD
Base Number Matches：1

CR16HCS5VJE7XXX 数据手册

 浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第2页浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第3页浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第4页浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第5页浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第6页浏览型号CR16HCS5VJE7XXX的Datasheet PDF文件第7页 
January 2002  
CR16HCS5/CR16HCS9/CR16MAR5/CR16MAS5  
CR16MAS9/CR16MBR5/CR16MCS5/CR16MCS9  
Family of 16-bit CAN-enabled CompactRISC  
Microcontrollers  
1.0 General Description  
The family of 16-bit CompactRISC™ microcontroller is  
based on a Reduced Instruction Set Computer (RISC) ar-  
chitecture. The device operates as a complete microcom-  
puter with all system timing, interrupt logic, flash program  
memory or ROM memory, RAM, EEPROM data memory,  
and I/O ports included on-chip. It is ideally suited to a wide  
range of embedded controller applications because of its  
high performance, on-chip integrated features and low  
power consumption resulting in decreased system cost.  
plex Instruction Set Computer (CISC): compact code, on-  
chip memory and I/O, and reduced cost. The CPU uses a  
three-stage instruction pipeline that allows execution of up  
to one instruction per clock cycle, or up to 25 million in-  
structions per second (MIPS) at a clock rate of 24 MHz.  
The device contains a FullCAN class, CAN serial interface  
for low/high speed applications with 15 orthogonal mes-  
sage buffers, each supporting standard as well as extend-  
ed message identifiers.  
The device offers the high performance of a RISC architec-  
ture while retaining the advantages of a traditional Com-  
Block Diagram  
Fast Clk Slow Clk*  
CR16B  
Processing  
Unit  
RISC Core  
CR16CAN  
FullCAN 2.0B  
Clock Generator  
Power-on-Reset  
Core Bus  
64k-Byte  
Flash  
Program  
Memory  
1.5k-Byte  
ISP  
Memory  
Power  
Manage-  
ment  
Peripheral  
Bus  
Controller  
2176-Byte  
Interrupt  
Control  
Timing and  
Watchdog  
3k-Byte  
RAM  
EEPROM  
Data  
Memory  
Peripheral Bus  
2x  
USART  
2 Analog  
Comparators  
ACCESS  
bus  
4x  
VTU  
2x  
MFT  
12-ch  
8-bit A/D  
I/O  
mWire/SPI  
MIWU  
Please note that not all family members contain same peripheral modules and features.  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
©2001 National Semiconductor Corporation  
www.national.com  
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