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CPC7594BBTR

更新时间: 2024-11-21 06:48:27
品牌 Logo 应用领域
CLARE 电信集成电路光电二极管
页数 文件大小 规格书
20页 597K
描述
Line Card Access Switch

CPC7594BBTR 数据手册

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CPC7594  
Line Card Access Switch  
Features  
Description  
TTL logic level inputs for 3.3V logic interfaces  
Smart logic for power up / hot plug state control  
Small 16-pin SOIC or 16-pin DFN Package  
DFN package printed-circuit board footprint is 60  
percent smaller than the SOIC version, 70 percent  
The CPC7594 is a member of Clare’s next generation  
Line Card Access Switch family. This monolithic 6-pole  
solid-state switch is available in either a 16-pin SOIC  
or a 16-pin DFN package. It provides the necessary  
functions to replace two 2-Form-C electro-mechanical  
relays used on traditional analog and contemporary  
integrated voice and data (IVD) line cards found in  
Central Office, Access, and PBX equipment. Because  
this device contains solid state switches for tip and ring  
line break, ringing injection/return and channel test  
access, it requires only a +5V supply for operation and  
TTL logic-level inputs for control.  
th  
smaller than 4 generation EMR solutions.  
Monolithic IC reliability  
Low matched R  
Eliminates the need for zero cross switching  
Flexible switch timing to transition from ringing mode  
to talk mode.  
ON  
Clean, bounce-free switching  
The CPC7594 is particularly designed for IVD line  
cards where an EMR is required for line test due to the  
high frequencies typical of ADSL but solid-state  
switches are desired for switching and test-in  
functions.  
Tertiary protection consisting of integrated current  
limiting, voltage clamping, and thermal shutdown for  
SLIC protection  
5 V operation with power consumption < 10 mW  
Intelligent battery monitor  
Latched logic-level inputs, no external drive circuitry  
required  
The CPC7594xC logic differs from the CPC7594xA/B  
logic by providing a monitor function during the test  
state.  
Applications  
VoIP Gateways  
Ordering Information  
Central office (CO)  
Digital Loop Carrier (DLC)  
PBX Systems  
Digitally Added Main Line (DAML)  
Hybrid Fiber Coax (HFC)  
Fiber in the Loop (FITL)  
Pair Gain System  
CPC7594 part numbers are specified as shown here:  
B - 16-pin SOIC delivered 50/Tube, 1000/Reel  
M - 16-pin DFN delivered 52/Tube, 1000/Reel  
CPC7594 x x xx  
TR - Add for Tape & Reel Version  
A - With Protection SCR  
B - Without Protection SCR  
Channel Banks  
C - With Protection SCR and “Monitor Test State”  
Figure 1. CPC7594 Block Diagram  
TTEST (TCHANTEST  
)
+5VDC  
TRINGING  
V
6
1
5
DD  
CPC7594  
SW3  
X
SW5  
X
Tip  
TBAT  
TLINE  
3
4
X
SW1  
Secondary  
Protection  
SLIC  
Ring  
SXW2  
R
LINE13  
RBAT  
14  
9
L
A
T
C
H
SW4  
SW6  
X
INTEST  
X
Switch  
Control  
Logic  
10  
VREF  
INRINGING  
LATCH  
11  
VBAT  
12 RRINGING  
6
2
FGND  
15  
VBAT  
8
7
SCR Trip Circuit  
(CPC7594xA/C)  
DGND  
TSD  
300Ω  
(min.)  
RINGING  
RTEST (RCHANTEST  
)
RoHS  
2002/95/EC  
Pb  
e3  
DS-CPC7594 - R03  
www.clare.com  
1

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