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CPC7594BB-TR

更新时间： 2024-11-25 21:13:35
品牌 Logo 应用领域
IXYS 开关光电二极管
页数 文件大小 规格书
20页 313K
描述
IC,TELECOM SWITCHING CIRCUIT,SOP,16PIN,PLASTIC

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中文翻译

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CPC7594BB-TR 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：SOP, SOP16,.4Reach Compliance Code：compliant
风险等级：5.7JESD-30 代码：R-PDSO-G16
端子数量：16最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP16,.4
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
电源：5 V认证状态：Not Qualified
子类别：Other Telecom ICs最大压摆率：2 mA
标称供电电压：5 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
Base Number Matches：1

CPC7594BB-TR 数据手册

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CPC7594  
Line Card Access Switch  
Features  
Description  
• TTL logic level inputs for 3.3V logic interfaces  
• Smart logic for power up / hot plug state control  
• Small 16-pin SOIC or Micro-Leadframe Package  
• MLP package printed-circuit board footprint is 60  
percent smaller than the SOIC version, 70 percent  
The CPC7594 is a member of Clare’s next generation  
Line Card Access Switch family. This monolithic 6-pole  
solid-state switch is available in either a 16-pin SOIC  
or a 16-pin MLP package. It provides the necessary  
functions to replace two 2-Form-C electro-mechanical  
relays used on traditional analog and contemporary  
integrated voice and data (IVD) line cards found in  
Central Office, Access, and PBX equipment. Because  
this device contains solid state switches for tip and ring  
line break, ringing injection/return and channel test  
access, it requires only a +5V supply for operation and  
TTL logic-level inputs for control.  
th  
smaller than 4 generation EMR solutions.  
• Monolithic IC reliability  
• Low matched R  
• Eliminates the need for zero cross switching  
• Flexible switch timing to transition from ringing mode  
to talk mode.  
ON  
• Clean, bounce-free switching  
The CPC7594 is particularly designed for IVD line  
cards where an EMR is required for line test due to the  
high frequencies typical of ADSL but solid-state  
switches are desired for switching and test-in  
functions.  
• Tertiary protection consisting of integrated current  
limiting, voltage clamping, and thermal shutdown for  
SLIC protection  
• 5 V operation with power consumption < 10 mW  
• Intelligent battery monitor  
• Latched logic-level inputs, no external drive circuitry  
required  
The CPC7594xC logic differs from the CPC7594xA/B  
logic by providing a monitor function during the test  
state.  
Applications  
• VoIP Gateways  
Ordering Information  
Specify CPC7594Bx for the SOIC package (47/tube)  
or CPC7594Mx for the MLP (94/tube). Add “TR”, sans  
quotes, to the part number for tape and reel  
packaging. SOIC: 1000/reel or MLP: 2000/reel.  
• Central office (CO)  
• Digital Loop Carrier (DLC)  
• PBX Systems  
• Digitally Added Main Line (DAML)  
• Hybrid Fiber Coax (HFC)  
• Fiber in the Loop (FITL)  
• Pair Gain System  
Part Number Description  
CPC7594xA  
CPC7594xB  
6-pole LCAS with protection SCR in tubes  
6-pole LCAS without protection SCR in tubes  
• Channel Banks  
6-pole LCAS with protection SCR and “Monitor”  
test state in tubes  
CPC7594xC  
Figure 1. CPC7594 Block Diagram  
TTEST (TCHANTEST  
)
+5VDC  
TRINGING  
V
5
1
6
DD  
CPC7594  
SW3  
SW5  
X
X
X
Tip  
TBAT  
TLINE  
3
4
X
SW1  
Secondary  
Protection  
SLIC  
Ring  
SXW2  
R
LINE13  
RBAT  
14  
9
L
A
T
C
H
SW4  
SW6  
INTEST  
X
Switch  
Control  
Logic  
10  
VREF  
INRINGING  
LATCH  
11  
VBAT  
12 RRINGING  
6
2
FGND  
15  
VBAT  
8
7
SCR Trip Circuit  
(CPC7594xA/C)  
DGND  
TSD  
300Ω  
(min.)  
RINGING  
RTEST (RCHANTEST  
)
DS-CPC7594 - R01.1  
www.clare.com  
1
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