CPC7593
Line Card Access Switch
Features
Description
• TTL logic level inputs for 3.3V logic interfaces
• Smart logic for power up / hot plug state control
• Improved switch dv/dt immunity of 500 V/µs
• Small 20 pin or 28 pin SOIC or 28 pin
micro-leadframe (MLP) package
The CPC7593 is a member of Clare’s next generation
Line Card Access Switch (LCAS) family. This
monolithic 10-pole line card access switch is available
in a 20 or 28 pin SOIC or a 28 pin MLP package. It
provides the necessary functions to replace three
2-Form-C electromechanical relays on analog line
cards or combined voice and data line cards found in
central office, access, and PBX equipment. The
device contains solid state switches for tip and ring line
break, ringing injection and test access. The CPC7593
requires only a +5 V supply and provides stable start
up conditioning during system power up and for hot
plug insertion applications. Once active, the inputs
respond to traditional TTL logic levels enabling the
CPC7593 to be used with 3.3V only logic.
• MLP version provides 65% PCB area reduction over
th
4 generation EMRs
• Monolithic IC reliability
• Low, matched, R
• Eliminates the need for zero-cross switching
• Flexible switch timing for transition from ringing
mode to talk mode.
ON
• Clean, bounce-free switching
• SLIC tertiary protection via integrated current
limiting, voltage clamping and thermal shutdown
• 5 V operation with power consumption < 10.5 mW
• Intelligent battery monitor
Ordering Information
For delivery in tubes, specify CPC7593Zx for the 20
pin SOIC (38/tube), CPC7593Bx for the 28 pin SOIC
(27/tube), or CPC7593Mx for the MLP (54/tube). For
tape and reel delivery, add “TR”, sans quotes to the
part number. SOIC: 20 or 28 pin (500/reel), MLP
(1000/reel).
• Logic-level inputs, no external drive circuitry required
Applications
• Standard voice linecards
• Integrated Voice and Data (IVD) linecards
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
Part Number Description
CPC7593xA
CPC7593xB
CPC7593xC
CPC7593xD
With protection SCR
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber in the Loop (FITL)
• Pair Gain System
Without protection SCR
Extra logic state and protection SCR
Extra logic state but without protection SCR
• Channel Banks
(TCHANTEST
)
TTESTin
+5 Vdc
12 VDD
(TDROPTEST
)
TTESTout
TRINGING
10
8
5
SXW7
CPC7593
XSW5
SW3
Tip
X
X
SW9
6 TBAT
TLINE
7
X
SW1
Secondary
Protection
SLIC
Ring
SW2
X
SW4
R
23
17
16
15
RLINE
22
BAT
INTESTin
L
A
T
C
H
SW10
SW6
X
X
X
SCR
Trip
Circuit
Switch
Control
Logic
INRINGING
INTESTout
VREF
X
18
LATCH
SW8
19
20
24
1
FGND
14 13
DGND
RRINGING
28
RTESTout (RDROPTEST
)
TSD
300Ω (min.)
VBAT
RINGING
VBAT
NOTE 1: Pin assignments are for the 28 pin package.
R
TESTin (RCHANTEST)
NOTE 2: Block diagram shown with the optional protection SCR.
DS-CPC7593 - R02
www.clare.com
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