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CPC7592BBTR

更新时间: 2024-11-21 06:48:27
品牌 Logo 应用领域
CLARE 电信集成电路光电二极管
页数 文件大小 规格书
20页 589K
描述
Line Card Access Switch

CPC7592BBTR 数据手册

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CPC7592  
Line Card Access Switch  
Features  
Description  
TTL logic level inputs for 3.3V logic interfaces  
Smart logic for power up / hot plug state control  
Small 16-pin SOIC or 16-Pin DFN Package  
DFN package printed-circuit board footprint is 60  
percent smaller than the SOIC version, 70 percent  
The CPC7592 is a member of Clare’s next generation  
Line Card Access Switch family. This monolithic 6-pole  
solid-state switch is available in either a 16-pin SOIC  
or a 16-pin DFN package. It provides the necessary  
functions to replace two 2-Form-C electro-mechanical  
relays used on traditional analog and contemporary  
integrated voice and data (IVD) line cards found in  
Central Office, Access, and PBX equipment. Because  
this device contains solid state switches for tip and ring  
line break, ringing injection/return and test access it  
requires only a +5V supply for operation and  
th  
smaller than 4 generation EMR solutions.  
Monolithic IC reliability  
Low matched R  
Eliminates the need for zero cross switching  
Flexible switch timing to transition from ringing mode  
to talk mode.  
ON  
logic-level inputs for control.  
Clean, bounce-free switching  
Tertiary protection consisting of integrated current  
limiting, voltage clamping, and thermal shutdown for  
SLIC protection  
The CPC7592 is very similar to the Clare CPC7582  
with the addition of controlled start-up states and TTL  
compatible logic inputs.  
5 V operation with power consumption < 10 mW  
Intelligent battery monitor  
Latched logic-level inputs, no external drive circuitry  
required  
The CPC7592xC logic provides alternative test states  
from the CPC7592xA/B and while also providing  
greater protection SCR trigger and hold current  
ratings.  
Applications  
VoIP Gateways  
Ordering Information  
Central office (CO)  
Digital Loop Carrier (DLC)  
PBX Systems  
CPC7592 part numbers are specified as shown here:  
B - 16-pin SOIC delivered 50/Tube, 1000/Reel  
M - 16-pin DFN delivered 52/Tube, 1000/Reel  
Digitally Added Main Line (DAML)  
Hybrid Fiber Coax (HFC)  
Fiber in the Loop (FITL)  
Pair Gain System  
CPC7592 x x xx  
TR - Add for Tape & Reel Version  
A - With Protection SCR  
B - Without Protection SCR  
C - With Protection SCR and “Monitor Test State”  
Channel Banks  
Figure 1. CPC7592 Block Diagram  
+5VDC  
TTEST  
TRINGING  
V
6
5
4
DD  
CPC7592  
SW5  
SW3  
X
X
X
Tip  
TBAT  
TLINE  
2
3
X
SW1  
Secondary  
Protection  
SLIC  
Ring  
SW2  
X
R
LINE14  
RBAT  
15  
9
L
A
T
C
H
INTEST  
SW6  
SW4  
X
Switch  
Control  
Logic  
10  
VREF  
INRINGING  
LATCH  
11  
12  
13 RRINGING  
1
FGND  
16  
VBAT  
8
7
SCR Trip Circuit  
(CPC7592xA/C)  
RTEST  
DGND  
TSD  
300Ω  
(min.)  
VBAT  
RINGING  
RoHS  
2002/95/EC  
Pb  
e3  
DS-CPC7592 - R03  
www.clare.com  
1

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