CPC7584
Line Card Access Switch
Features
Description
• Small 16-pin SOIC or micro-leadframe package
• Micro-leadframe package (MLP) printed circuit board
The CPC7584 is a monolithic solid state switch in a
16-pin SOIC or MLP surface mount package. It
provides the necessary functions to replace two
2-Form-C electro-mechanical relays on traditional
analog and integrated voice and data (IVD) line cards
found in Central Office, Access, and PBX equipment.
The device contains solid state switches for tip and
ring line break, ringing injection/ringing return and
channel test access. The CPC7584 requires only a
+5V supply and offers “break-before-make” or
“make-before-break” switch operation using simple
logic-level input control.
TH
footprint is 70% smaller than 4 generation EMRs
and 60% smaller than SOIC version
• Monolithic IC reliability
• Low matched R
• Eliminates the need for zero cross switching
• Flexible switch timing to transition from ringing mode
to talk mode.
ON
• Clean, bounce free switching
• Tertiary protection consisting of integrated current
limiting, voltage clamping, and thermal shutdown for
SLIC protection
• 5V operation with power consumption < 10 mW
• Intelligent battery monitor
The CPC7584xC logic differs from the CPC7584xA/B
with an enhancement permitting channel monitoring in
the test state. See “Functional Description” on page 9
for more information. The CPC7584xC also has a
higher trigger and hold current for the protection SCR.
Specify CPC7584Bx for SOIC or specify CPC7582Mx
for MLP devices shipped in tubes. Append the part
number with the suffix TR for tape and reel packaging.
• Latched logic level inputs, no external drive circuitry
required
Applications
• Central office (CO)
• Digital Loop Carrier (DLC)
• PBX Systems
Ordering Information
• Digitally Added Main Line (DAML)
• Hybrid Fiber Coax (HFC)
• Fiber in the Loop (FITL)
• Pair Gain System
Part Number Description
CPC7584xA
CPC7584xB
CPC7584xC
With protection SCR
Without protection SCR
With protection SCR and “Monitor” test state
• Channel Banks
Figure 1. CPC7584 Block Diagram
(TCHANTEST
)
TTEST
+5 Vdc
T
VDD
6
1
8
RINGING
CPC7584
SW3
SW5
Tip
X
X
X
TLINE
TBAT
3
4
X
SW1
Secondary
Protection
SLIC
Ring
SXW2
RLINE
RBAT
14
13
9
L
A
T
C
H
INTEST
SW6
SW4
X
SCR
and
Trip
Switch
Control
Logic
VREF
10
INRINGING
Circuit
11
LATCH
TSD
VBAT
12
16
2
15
VBAT
8
7
RRINGING
FGND
DGND
300Ω
(min.)
RINGING
RTEST (RCHANTEST
)
DS-CPC7584 - R0B
www.clare.com
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