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COP87L89EB-XE PDF预览

COP87L89EB-XE

更新时间: 2024-11-13 20:32:27
品牌 Logo 应用领域
德州仪器 - TI 可编程只读存储器时钟微控制器外围集成电路
页数 文件大小 规格书
72页 723K
描述
8-BIT, OTPROM, MICROCONTROLLER, PQCC68, PLASTIC, LCC-68

COP87L89EB-XE 技术参数

是否Rohs认证:不符合生命周期:Obsolete
包装说明:QCCJ, LDCC68,1.0SQReach Compliance Code:unknown
HTS代码:8542.31.00.01风险等级:5.92
Is Samacsys:N具有ADC:YES
地址总线宽度:位大小:8
CPU系列:COP800最大时钟频率:1 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:JESD-30 代码:S-PQCC-J68
JESD-609代码:e0长度:24.13 mm
I/O 线路数量:58端子数量:68
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC68,1.0SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not QualifiedRAM(字节):192
ROM(单词):8096ROM可编程性:OTPROM
座面最大高度:4.57 mm速度:1 MHz
子类别:Microcontrollers最大压摆率:16 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:J BEND
端子节距:1.27 mm端子位置:QUAD
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:24.13 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLERBase Number Matches:1

COP87L89EB-XE 数据手册

 浏览型号COP87L89EB-XE的Datasheet PDF文件第2页浏览型号COP87L89EB-XE的Datasheet PDF文件第3页浏览型号COP87L89EB-XE的Datasheet PDF文件第4页浏览型号COP87L89EB-XE的Datasheet PDF文件第5页浏览型号COP87L89EB-XE的Datasheet PDF文件第6页浏览型号COP87L89EB-XE的Datasheet PDF文件第7页 
OBSOLETE  
January 2000  
COP87L88EB/COP87L89EB  
8-Bit One Time Programmable (OTP) Microcontroller  
with CAN Interface, A/D and UART  
— MICROWIRE/PLUS and SPI  
— Multi-input Wake up  
— Software Trap  
— CAN interface (3 interrupts)  
General Description  
The COP87L88EB/COP87L89EB are members of the  
COP8 microcontroller feature family, which uses an 8-bit  
core architecture. They are pin and software compatible to  
the mask ROM COP888EB product family. The devices are  
designed to perform complex embedded control applications  
such as those found in Automotive Control Applications,  
while providing control/diagnostic communications via the  
CAN bus interface. The devices comply with the basic CAN  
bus specification 2.0B (Passive). They are fully static de-  
vices fabricated using National’s double metal silicon gate  
microCMOS technology. Efficient throughput is achieved  
through a regular efficient instruction set operating at a maxi-  
mum of 1 µs instruction rate.  
— UART (2 Inputs)  
n Versatile easy to use instruction set  
n 8-bit stacker pointer (SP) (Stack in RAM)  
n Two 8-bit RegisterR Indirect Memory Pointers (B, X)  
Fully Static CMOS  
n Low current drain (typically 1 µA)  
n Two power saving modes: HALT, IDLE  
n Single supply operation: 4.5V to 5.5V  
n Temperature range: −40˚C to +85˚C  
<
Key Features  
Development Support  
n CAN bus interface, with Software Power save mode  
n 8-bit A/D Converter with 8 channels  
n Fully buffered UART  
n Emulation device for COP888EB  
n Real time emulation and full program debug offered by  
MetaLink Development System  
n Multi-input wake up (MIWU) on both Port L and M  
n SPI Compatible Master/Slave Interface  
n 8096 bytes of on-board OTP EPROM with security  
feature  
Basic Functional Description  
n CAN I/F — CAN serial bus interface block as described  
in the CAN specification part 2.0B (Passive)  
— Interface rates up to 250k bit/s are supported utilizing  
standard message identifiers  
n 192 bytes of on-board RAM  
Additional Peripheral Features  
n Idle timer (programmable)  
n Two 16-bit timer, with two 16-bit registers supporting  
— Processor independent PWM mode  
— External Event counter mode  
— Input capture mode  
n Programmable double buffered UART  
n A/D — 8-bit, 8 channel, 1-LSB Resolution, with improved  
Source Impedance and improved channel to channel  
cross talk immunity  
n Multi-Input-Wake-Up (MIWU) — edge selectable wake-up  
and interrupt capability via input port and CAN interface  
(Port L, Port M and CAN I/F); supports Wake-Up  
capability on SPI, UART, and T2  
n WATCHDOG and Clock Monitor  
n MICROWIRE/PLUS serial I/O  
n Port C — 8-bit bi-directional I/O port  
n Port D — 8-bit Output port with high current drive  
capability (10 mA)  
n Port E — 8-bit bidirectional I/O  
n Port F — 8-bit bidirectional I/O  
n Port G — 8-bit bidirectional I/O port, including alternate  
functions for:  
I/O Features  
n Memory mapped I/O  
n Software selectable I/O options (TRI-STATE® outputs,  
Push pull outputs, Weak pull up input, High impedance  
input)  
n Schmitt trigger inputs on Port G, L and M  
n Packages: 44 PLCC with 31 I/O pins;  
68 PLCC with 58 I/O pins  
— MICROWIRE Input and Output  
— Timer 1 Input or Output (Depending on mode  
selected)  
— External Interrupt input  
— WATCHDOG Output  
n Port I — 8-bit input port combining either digital input, or  
up to eight A/D input channels  
CPU/Instruction Set Features  
n 1 µs instruction cycle time  
n Fourteen multi-sourced vectored interrupts servicing  
— External interrupt  
— Idle Timer T0  
— Timers (T1 and T2) (4 Interrupts)  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
COP8 , MICROWIRE/PLUS , WATCHDOG and MICROWIRE are trademarks of National Semiconductor Corporation.  
iceMASTER is a trademark of MetaLink Corporation.  
© 2000 National Semiconductor Corporation  
DS012871  
www.national.com  

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