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CLC111AJE-TR13 PDF预览

CLC111AJE-TR13

更新时间: 2024-11-05 21:21:31
品牌 Logo 应用领域
德州仪器 - TI 放大器光电二极管
页数 文件大小 规格书
10页 239K
描述
BUFFER AMPLIFIER, PDSO8, PLASTIC, SOIC-8

CLC111AJE-TR13 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:SOP, SOP8,.25Reach Compliance Code:unknown
ECCN代码:EAR99HTS代码:8542.33.00.01
风险等级:5.9放大器类型:BUFFER
最大平均偏置电流 (IIB):15 µA标称带宽 (3dB):450 MHz
25C 时的最大偏置电流 (IIB):15 µA最大输入失调电压:9000 µV
JESD-30 代码:R-PDSO-G8JESD-609代码:e0
长度:4.9 mm负供电电压上限:-7 V
标称负供电电压 (Vsup):-5 V功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最小输出电流:0.05 A
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:+-5 V认证状态:Not Qualified
座面最大高度:1.75 mm最小摆率:2700 V/us
标称压摆率:3500 V/us子类别:Buffer Amplifiers
最大压摆率:12 mA供电电压上限:7 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BIPOLAR温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

CLC111AJE-TR13 数据手册

 浏览型号CLC111AJE-TR13的Datasheet PDF文件第2页浏览型号CLC111AJE-TR13的Datasheet PDF文件第3页浏览型号CLC111AJE-TR13的Datasheet PDF文件第4页浏览型号CLC111AJE-TR13的Datasheet PDF文件第5页浏览型号CLC111AJE-TR13的Datasheet PDF文件第6页浏览型号CLC111AJE-TR13的Datasheet PDF文件第7页 
February 2001  
CLC111  
Ultra High Slew Rate, Closed Loop Buffer  
n Very low output impedance (1.4)  
General Description  
@
n Low (−62dBc) 2nd/3rd harmonics 20MHz  
The CLC111 is a high performance, closed loop, monolithic  
buffer designed for applications requiring very high  
frequency signals. The CLC111’s high performance includes  
an extremely fast 800MHz small signal bandwidth (0.5pp)  
and an ultra high (3500V/µs) slew rate while requiring only  
10.5mA quiescent current. Signal fidelity is maintained with  
low harmonic distortion (−62dBc 2nd and 3rd harmonics at  
±
n 60mA output current ( 5 supplies)  
n Single supply operation (0 to 3V supply min.)  
n Evaluation boards and Spice models  
Applications  
n Video switch buffers  
n Test point drivers  
20MHz). These performance characteristics are for  
a
demanding 100load.  
n High frequency active filters  
n Wideband DC clamping buffer  
n High-speed peak detector circuits  
Featuring a patented closed loop design, the CLC111 offers  
nearly ideal unity gain (0.996) with a very low (1.4) output  
impedance. The CLC111 is ideally suited for buffering video  
signals with its 0.15%/0.04˚ differential gain and phase  
performance at 4.43MHz. Power sensitive applications will  
benefit from the CLC111’s excellent performance on reduced  
or single supply voltages.  
±
Pulse Response for 5V  
Constructed using an advanced, complementary bipolar  
process and National’s proven high performance  
architectures, the CLC111 is available in several versions to  
meet a variety of requirements.  
Enhanced Solutions (Military/Aerospace)  
SMD Number: contact factory  
Space level versions also available.  
For more information, visit http://www.national.com/mil  
Features  
n Very wideband (800MHz)  
n Ultra high (3500V/µs) slew rate  
DS012720-1  
Connection Diagram  
DS012720-2  
Pinout  
DIP & SOIC  
© 2001 National Semiconductor Corporation  
DS012720  
www.national.com  

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