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CH41HA122KA80A0 PDF预览

CH41HA122KA80A0

更新时间： 2024-11-08 20:43:47
品牌 Logo 应用领域
京瓷/艾维克斯 - KYOCERA AVX 电容器
页数 文件大小 规格书
4页 65K
描述
Ceramic Capacitor, Multilayer, Ceramic, 3000V, 10% +Tol, 10% -Tol, C0G, 30ppm/Cel TC, 0.0012uF, Through Hole Mount, 3436, DIP

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CH41HA122KA80A0 技术参数

是否无铅： 含铅是否Rohs认证： 不符合
生命周期：Active包装说明：, 3436
Reach Compliance Code：not_compliantECCN代码：EAR99
风险等级：5.78电容：0.0012 µF
电容器类型：CERAMIC CAPACITOR介电材料：CERAMIC
高度：5.8 mmJESD-609代码：e0
长度：8.7 mm安装特点：THROUGH HOLE MOUNT
多层：Yes负容差：10%
端子数量：2最高工作温度：125 °C
最低工作温度：-55 °C封装形状：RECTANGULAR PACKAGE
封装形式：DIP正容差：10%
额定（直流）电压（URdc）：3000 V尺寸代码：3436
表面贴装：NO温度特性代码：C0G
温度系数：-/+30ppm/Cel ppm/ °C端子面层：Tin/Lead (Sn/Pb)
端子节距：2.54 mm端子形状：FLAT
宽度：9.2 mmBase Number Matches：1

CH41HA122KA80A0 数据手册

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High Voltage Leaded (CH Style)  
Radial, Dual-in-Line & ‘L’ Lead SMT  
330 pF to 2.7 μF  
This range of radial, dual-in-line for both through hole and  
surface mount products is intended for use in high voltage  
power supplies and voltage multiplier circuits. The multilayer  
ceramic construction offers excellent volumetric efficiency  
compared with other high voltage dielectrics. They are suitable  
for both high reliability and industrial applications.  
1kV to 5kV  
-55ºC to +125ºC  
1B/C0G and 2C1/X7R Dielectrics  
ELECTRICAL SPECIFICATIONS  
Temperature Coefficient CECC 30 000, (4.24.1)  
1B/C0G: A Temperature Coefficient - 0 30ppm/ºC  
2C1/X7R: C Temperature Characteristic - 15ꢀ (0v dc)  
Dielectric Withstanding Voltage 25°C  
130ꢀ rated voltage for 5 seconds  
Life Test (1000 hrs) CECC 30000 (4.23)  
Capacitance Test 25ºC  
1B/C0G & 2C1/X7R: 120ꢀ rated voltage at +125ºC.  
1B/C0G: Measured at 1 VRMS max at 1KHz (1MHz <100 pF)  
2C1/X7R: Measured at 1 VRMS max at 1KHz  
Aging  
1B/C0G: Zero  
2C1/X7R: 2.5ꢀ/decade hour  
Dissipation Factor 25°C  
1B/C0G: 0.15ꢀ max at 1KHz, 1 VRMS (1MHz for <100 pF)  
2C1/X7R: 2.5ꢀ max at 1KHz, 1 VRMS  
Insulation Resistance  
1B/C0G & 2C1/X7R: 100K megohms or 1000 megohms-μF,  
whichever is less  
DUAL-IN-LINE  
3.8  
(0.149)  
max.  
W max.  
2.0  
W max.  
(0.079)  
max.  
L max.  
2.54 (0.100)  
0.5 (0.200)  
L
max.  
3.8 (0.149)  
13 (0.512)  
1.0 (0.039)  
max.  
S 0.5 (0.020)  
S 0.5  
2.54 (0.100) 0.5 (0.200)  
L1  
L2  
(0.020)  
L2  
L1  
2.54 (0.100) 0.5 (0.200)  
DIMENSIONS  
millimeters (inches)  
No. of  
Leads  
per side  
L
W
S
Style  
(max)  
(max)  
(nom)  
CH41  
CH51  
9.2 (0.362)  
10.7 (0.421)  
14.9 (0.587)  
21.6 (0.850)  
24.0 (0.944)  
8.7 (0.342)  
10.7 (0.421)  
13.6 (0.535)  
16.6 (0.654)  
40.6 (1.598)  
8.2 (0.323)  
10.2 (0.400)  
14.0 (0.551)  
20.3* (0.800)  
20.3* (0.800)  
3
4
Lead width 0.5 (0.020)  
Lead thickness 0.254 (0.010)  
L1 = L2 0.5 (0.020)  
CH61  
5
CH76  
6
CH91  
14  
*Tolerance ꢀ0.  
HOW TO ORDER  
CH  
41  
A
C
104  
K
A
8
0
A
7
Style  
Code  
Size Voltage Dielectric Capacitance Capacitance  
Specification  
Code  
Finish  
Code  
Lead Dia.  
Code  
0 = Standard  
Lead Space  
Code  
A = Standard  
Lead Style  
Code  
Code Code  
Code  
A = C0G  
C = X7R  
Code  
(2 significant  
digits + no.  
of zeros)  
eg. 105 = 1 μF  
106 = 10 μF  
107 = 100 μF  
Tolerance  
C0G: J = 5ꢀ  
K = 10ꢀ  
A = 1kV  
G = 2kV  
H = 3kV  
J = 4kV  
A = Non customized 8 = Varnish  
0 = Dual in line  
straight  
M = 20ꢀ  
X7R: K = 10ꢀ  
M = 20ꢀ  
7 = Dual in line  
‘L’ style  
K = 5kV  
P = +100, -0ꢀ  
65  
1234

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CH41HA122KA80A7 KYOCERA AVX

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 		Ceramic Capacitor, Multilayer, Ceramic, 3000V, 10% +Tol, 10% -Tol, C0G, 30ppm/Cel TC, 0.00
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CH41HA122PA80A7 KYOCERA AVX

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 		Ceramic Capacitor, Multilayer, Ceramic, 3000V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.0008
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 		Ceramic Capacitor, Multilayer, Ceramic, 3000V, 10% +Tol, 10% -Tol, C0G, 30ppm/Cel TC, 0.00
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