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CDP1871ACE

更新时间: 2024-11-17 22:48:47
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英特矽尔 - INTERSIL 外围集成电路光电二极管编码器
页数 文件大小 规格书
10页 60K
描述
CMOS Keyboard Encoder

CDP1871ACE 数据手册

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CDP1871A,  
CDP1871AC  
REFERENCE APP NOTE 7374  
August 1996  
CMOS Keyboard Encoder  
Features  
Description  
• Directly Interfaces with CDP1800-Series Microprocessor  
• Low Power Dissipation  
The CDP1871A is a keyboard encoder designed to  
directly interface between a CDP1800-series micro-  
processor and a mechanical keyboard array, providing  
up to 53 ASCII coded keys and 32 HEX coded keys,  
as shown in the system diagram (Figure 1).  
• Three-State Outputs  
• Scans and Generates Code for 53 Key ASCII Keyboard Plus  
32 HEX Keys (SPST Mechanical Contact Switches)  
The keyboard may consist of simple single-pole  
single-throw (SPST) mechanical switches. Inputs are  
provided for alpha-lock, control, and shift functions,  
allowing 160 unique codes. An external R-C input is  
available for user-selectable debounce times. The N-  
key lock-out feature prevents unwanted key codes if  
two or more keys are pressed simultaneously.  
• Shift, Control, and Alpha Lock Input  
• RC-Controlled Debounce Circuitry  
• Single Supply 4V to 10.5V. . . . . . . . . . . . . (CDP1871A)  
4V to 6.5V. . . . . . . . . . . . . (CDP1871AC)  
• N-Key Lockout  
The CDP1871A and CDP1871AC are functionally  
identical. They differ in that the CDP1871A has a  
recommended operating voltage range of 4V to 10.5V,  
and the CDP1871AC has a recommended operating  
voltage range 4V to 6.5V. These types are supplied in  
40 lead dual-in-line ceramic packages (D suffix), and  
40 lead dual-in-line plastic packages (E suffix), and 44  
lead plastic chip-carrier packages (Q suffix).  
Ordering Information  
PKG.  
NO.  
PACKAGE TEMP. RANGE  
5V  
10V  
o
o
PDIP  
-40 C to +85 C CDP1871ACE CDP1871AE E40.6  
o
o
PLCC  
SBDIP  
-40 C to +85 C CDP1871ACQ  
-
N44.65  
-40 C to +85 C CDP1871ACD CDP1871AD D40.6  
CDP1871ACDX D40.6  
o
o
Burn-In  
-
Pinouts  
44 LEAD PLCC  
40 LEAD PDIP, CERDIP  
TOP VIEW  
(Q Suffix) TOP VIEW  
D1  
1
2
3
4
5
6
7
8
9
40 VDD  
D2  
D3  
D4  
D5  
D6  
D7  
D8  
D9  
39 SHIFT  
38 CONTROL  
37 ALPHA  
36 DEBOUNCE  
35 RTP  
6
5
4
3
2
1
44 43 42 41 40  
D5  
D6  
D7  
D8  
D9  
D10  
D11  
S1  
7
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
RPT  
8
TPB  
34 TPB  
9
DA  
33 DA  
10  
11  
12  
13  
14  
15  
16  
17  
BUS 7  
BUS 6  
BUS 5  
BUS 4  
BUS 3  
BUS 2  
BUS 1  
NC  
32 BUS 7  
31 BUS 6  
30 BUS 5  
29 BUS 4  
28 BUS 3  
27 BUS 2  
26 BUS 1  
25 BUS 0  
24 CS4  
D10 10  
D11 11  
S1 12  
S2 13  
S3 14  
S4 15  
S5 16  
S6 17  
S7 18  
S8 19  
VSS 20  
S2  
S3  
S4  
18 19 20 21 22 23 24 25 26 27 28  
23 CS3  
22 CS2  
21 CS1  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
File Number 1374.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
4-66  

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