CDCLVP110LQFP

更新时间： 2024-11-25 21:54:55

品牌	Logo	应用领域
德州仪器 - TI		时钟驱动器输入元件
页数	文件大小	规格书
11页	133K
描述
LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

CDCLVP110LQFP 数据手册

CDCLVP110

www.ti.com

SCAS683A–JUNE 2002–REVISED AUGUST 2002

LOW-VOLTAGE 1:10 LVPECL/HSTL

WITH SELECTABLE INPUT CLOCK DRIVER

FEATURES

DESCRIPTION

•

Distributes One Differential Clock Input Pair

LVPECL/HSTL to 10 Differential LVPECL

Clock Outputs

The CDCLVP110 clock driver distributes one

differential clock pair of either LVPECL or HSTL

(selectable) input, (CLK0, CLK1) to ten pairs of

differential LVPECL clock (Q0, Q9) outputs with

minimum skew for clock distribution. The

CDCLVP110 can accept two clock sources into an

input multiplexer. The CLK0 input accepts either

LVECL/LVPECL input signals, while CLK1 accepts an

HSTL input signal when operated under LVPECL

conditions. The CDCLVP110 is specifically designed

for driving 50-Ω transmission lines.

•

Fully Compatible With LVECL/LVPECL/HSTL

Single Supply Voltage Required, ±3.3-V or

±2.5-V Supply

•

Selectable Clock Input Through CLK_SEL

Low-Output Skew (Typ 15 ps) for

Clock-Distribution Applications

•

VBB Reference Voltage Output for

Single-Ended Clocking

The VBB reference voltage output is used if

single-ended input operation is required. In this case

the VBB pin should be connected to CLK0 and

bypassed to GND via a 10-nF capacitor.

•

Available in a 32-Pin LQFP Package

Frequency Range From DC to 3.5 GHz

Pin-to-Pin Compatible With MC100 Series

EP111, ES6111, LVEP111, PTN1111

However, for high-speed performance up to 3.5 GHz,

the differential mode is strongly recommended.

LQFP PACKAGE

(TOP VIEW)

The CDCLVP110 is characterized for operation from

-40°C to 85°C.

24 23 22 21 20 19 18 17

FUNCTION TABLE

CLK_SEL

ACTIVE CLOCK INPUT

CLK0, CLK0

CLK1, CLK1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...11

中文翻译

下载PDF

与CDCLVP110LQFP相关器件

型号	品牌	获取价格	描述	数据表
CDCLVP110MVFR	TI	获取价格	1:10 LVPECL/HSTL 至 LVPECL 时钟驱动器 \| VF \| 32 \| -
CDCLVP110VF	TI	获取价格	LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER
CDCLVP110VFG4	TI	获取价格	1:10 LVPECL/HSTL 至 LVPECL 时钟驱动器 \| VF \| 32 \| -
CDCLVP110VFR	TI	获取价格	LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER
CDCLVP111	TI	获取价格	LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
CDCLVP111-EP	TI	获取价格	具有可选输入的 HiRel、1:10 LVPECL 缓冲器
CDCLVP111HFG/EM	TI	获取价格	1:10 High Speed Clock Buffer with Selectable Input Clock Driver 36-CFP 25 to 25
CDCLVP111MVFREP	TI	获取价格	1:10 LVPECL Buffer with Selectable Input 32-LQFP -55 to 125
CDCLVP111RHBR	TI	获取价格	LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER
CDCLVP111RHBT	TI	获取价格	LOW-VOLTAGE 1:10 LVPECL WITH SELECTABLE INPUT CLOCK DRIVER

与CDCLVP110LQFP相关文章

解析光耦仿真器：升级光耦合器技术的必要性
2024-11-18

45
英伟达新一代Blackwell GPU过热问题致交付延迟
2024-11-18

34
国产厂商思特威CMOS图像传感器芯片单月出货超1亿颗，技术创新引领行业发展
2024-11-14

62
台积电5nm和3nm产能利用率达100%，半导体行业景气度持续攀升
2024-11-14

59

产品中心

服务支持

精选活动

关于我们

帮助中心

CDCLVP110LQFP

CDCLVP110LQFP 数据手册

与CDCLVP110LQFP相关器件

与CDCLVP110LQFP相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

CDCLVP110LQFP

CDCLVP110LQFP 数据手册

与CDCLVP110LQFP相关器件

与CDCLVP110LQFP相关文章

您还可以找

您在本页遇到什么问题？