Datasheet > CD74HCT652MG4

CD74HCT652MG4

更新时间： 2024-02-24 04:01:05

品牌	Logo	应用领域
德州仪器 - TI		光电二极管输出元件逻辑集成电路触发器
页数	文件大小	规格书
14页	204K
描述
HCT SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24

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CD74HCT652MG4 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	GREEN, PLASTIC, SOIC-24	针数：	24
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.39	Is Samacsys：	N
其他特性：	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	控制类型：	INDEPENDENT CONTROL
计数方向：	BIDIRECTIONAL	系列：	HCT
JESD-30 代码：	R-PDSO-G24	JESD-609代码：	e4
长度：	15.4 mm	逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER
最大I（ol）：	0.006 A	湿度敏感等级：	1
位数：	8	功能数量：	1
端口数量：	2	端子数量：	24
最高工作温度：	125 °C	最低工作温度：	-55 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP24,.4	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	包装方法：	TUBE
峰值回流温度（摄氏度）：	260	电源：	5 V
Prop。Delay @ Nom-Sup：	56 ns	传播延迟（tpd）：	56 ns
认证状态：	Not Qualified	座面最大高度：	2.65 mm
子类别：	Bus Driver/Transceivers	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	MILITARY	端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
翻译：	N/A	触发器类型：	POSITIVE EDGE
宽度：	7.5 mm	Base Number Matches：	1

CD74HCT652MG4 数据手册

CD74HC652,

CD74HCT652

Data sheet acquired from Harris Semiconductor

SCHS194A

High-Speed CMOS Logic

Octal-Bus Transceiver/Registers, Three-State

February 1998 - Revised May 2003

Features

Description

• CD74HC652, CD74HCT652 . . . . . . . . . . . Non-Inverting The CD74HC652 and CD74HCT652 three-state, octal-bus

transceiver/registers use silicon-gate CMOS technology to

• Independent Registers for A and B Buses

[ /Title (CD74HC652, CD74HCT652)

/_•S_Tu_hb_rj_ee_ec_-t_S(_taH_teig_Oh_u-_tS_pp_ue_tsed CMOS Logic Octal-Bus

Transceiver/Registers, Three-State)

/^•A^Du^rtⁱh^veo^sr¹(⁵) ^{LSTTL Loads}

achieve operating speeds similar to LSTTL with the low power

consumption of standard CMOS integrated circuits. The

CD74HC652 and CD74HCT652 have non-inverting outputs.

These devices consists of bus transceiver circuits, D-type flip-

flops, and control circuitry arranged for multiplexed

transmission of data directly from the data bus or from the

= 5V, C = 15pF

/^•K^Te^yy^pw^icao^lr^Pd^rs^op()^{agation Delay = 12ns at V}

/Creator ()

• Fanout (Over Temperature Range)

internal storage registers. Output Enables OE

and OE

- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads

are provided to control the transceiver functions. SAB and

SBA control pins are provided to select whether real-time or

stored data is transferred. The circuitry used for select control

will eliminate the typical decoding glitch that occurs in a

multiplexer during the transition between stored and real-time

data. A LOW input level selects real-time data, and a HIGH

selects stored data. The following examples demonstrates the

four fundamentals bus-management functions that can be

performed with the octal-bus transceivers and registers.

/DOCINFO pdfmark

- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads

• Wide Operating Temperature Range . . . -55 C to 125 C

[ /PageMode /UseOutlines

/•DBOalCanVcIeEdWProppdafgmataiorkn Delay and Transition Times

• Signiﬁcant Power Reduction Compared to LSTTL

Logic ICs

• Alternate Source is Philips

Data on the A or B data bus, or both, can be stored in the

internal D flip-flops by low-to-high transitions at the appropriate

clock pins (CAB or CBA) regardless of the select of the control

pins. When SAB and SBA are in the real-time transfer mode, it

is also possible to store data without using the D-type flip-flops

• HC Types

- 2V to 6V Operation

- High Noise Immunity: N = 30%, N = 30% of V

IL IH CC

at V

= 5V

by simultaneously enabling OE

and OE . In this

• HCT Types

configuration, each output reinforces its input. Thus, when all

other data sources to the two sets of bus lines are at high

impedance, each set of bus lines will remain at its last state.

- 4.5V to 5.5V Operation

- Direct LSTTL Input Logic Compatibility,

V = 0.8V (Max), V = 2V (Min)

IL IH

- CMOS Input Compatibility, I ≤ 1µA at V , V

Ordering Information

OL OH

TEMP. RANGE

PART NUMBER

CD74HC652EN

( C)

PACKAGE

24 Ld PDIP

Pinout

-55 to 125

CD74HC652

(PDIP)

CD74HCT652

( SOIC)

CD74HCT652M

24 Ld SOIC

CD74HCT652M96

TOP VIEW

NOTE: When ordering, use the entire part number. The sufﬁx 96

denotes tape and reel.

CAB

SAB

23 CBA

22 SBA

21 OE

20 B0

19 B1

18 B2

17 B3

16 B4

15 B5

14 B6

13 B7

A6 10

A7 11

GND 12

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

12 3 4 5 6 7...14

中文翻译

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