是否Rohs认证: | 不符合 | 生命周期: | Obsolete |
包装说明: | SOP, SOP14,.25 | Reach Compliance Code: | unknown |
风险等级: | 5.92 | JESD-30 代码: | R-PDSO-G14 |
JESD-609代码: | e0 | 负载电容(CL): | 50 pF |
逻辑集成电路类型: | XNOR GATE | 最大I(ol): | 0.004 A |
端子数量: | 14 | 最高工作温度: | 85 °C |
最低工作温度: | -40 °C | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装等效代码: | SOP14,.25 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
电源: | 2/6 V | Prop。Delay @ Nom-Sup: | 29 ns |
施密特触发器: | NO | 子类别: | Gates |
表面贴装: | YES | 技术: | CMOS |
温度等级: | INDUSTRIAL | 端子面层: | Tin/Lead (Sn/Pb) |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL |
型号 | 品牌 | 描述 | 获取价格 | 数据表 |
CD74HC7266MTE4 | TI | High-Speed CMOS Logic Quad 2-Input EXCLUSIVE NOR Gate |
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|
CD74HC7266MTG4 | TI | High-Speed CMOS Logic Quad 2-Input EXCLUSIVE NOR Gate |
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|
CD74HC73 | TI | Dual J-K Flip-Flop with Reset Negative-Edge Trigger |
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|
CD74HC73E | TI | Dual J-K Flip-Flop with Reset Negative-Edge Trigger |
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|
CD74HC73EE4 | TI | Dual J-K Flip-Flop with Reset Negative-Edge Trigger |
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|
CD74HC73EN | ETC | Logic IC |
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