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CD74HC4351M96G4 PDF预览

CD74HC4351M96G4

更新时间： 2024-11-04 05:18:19
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德州仪器 - TI 解复用器
页数 文件大小 规格书
23页 473K
描述
High-Speed CMOS Logic Analog Multiplexers/Demultiplexers with Latch

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CD74HC4351M96G4 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Obsolete零件包装代码：SOIC
包装说明：SOP, SOP20,.4针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.7其他特性：ALSO OPERATES AT 2V TO 10V (VCC-VEE) SUPPLY
模拟集成电路 - 其他类型：SINGLE-ENDED MULTIPLEXERJESD-30 代码：R-PDSO-G20
JESD-609代码：e4长度：12.8 mm
湿度敏感等级：1标称负供电电压 (Vsup)：-4.5 V
信道数量：8功能数量：1
端子数量：20标称断态隔离度：73 dB
通态电阻匹配规范：10 Ω最大通态电阻 (Ron)：240 Ω
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP20,.4封装形状：RECTANGULAR
封装形式：SMALL OUTLINE峰值回流温度（摄氏度）：260
电源：2/6,GND/-6 V认证状态：Not Qualified
座面最大高度：2.65 mm最大信号电流：0.025 A
子类别：Multiplexer or Switches最大供电电流 (Isup)：0.16 mA
最大供电电压 (Vsup)：6 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：4.5 V表面贴装：YES
最长断开时间：375 ns最长接通时间：450 ns
切换：BREAK-BEFORE-MAKE技术：CMOS
温度等级：MILITARY端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：GULL WING端子节距：1.27 mm
端子位置：DUAL处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7.5 mmBase Number Matches：1

CD74HC4351M96G4 数据手册

 浏览型号CD74HC4351M96G4的Datasheet PDF文件第2页浏览型号CD74HC4351M96G4的Datasheet PDF文件第3页浏览型号CD74HC4351M96G4的Datasheet PDF文件第4页浏览型号CD74HC4351M96G4的Datasheet PDF文件第5页浏览型号CD74HC4351M96G4的Datasheet PDF文件第6页浏览型号CD74HC4351M96G4的Datasheet PDF文件第7页 
CD54HC4351, CD74HC4351,  
CD74HCT4351, CD74HC4352  
Data sheet acquired from Harris Semiconductor  
SCHS213C  
High-Speed CMOS Logic  
Analog Multiplexers/Demultiplexers with Latch  
September 1998 - Revised July 2003  
CMOS technology to achieve operating speeds similar to  
LSTTL with the low power consumption of standard CMOS  
integrated circuits.  
Features  
• Wide Analog Input Voltage Range . . . . . . . . . ±5V (Max)  
• Low “On” Resistance  
[ /Title  
(CD74  
HC435  
1,  
CD74  
HCT43  
51,  
CD74  
HC435  
2)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Ana-  
log  
Multi-  
plex-  
ers/De  
multi-  
plex-  
ers  
These analog multiplexers/demultiplexers are, in essence,  
the HC/HCT4015 and HC4052 preceded by address latches  
that are controlled by an active low Latch Enable input (LE).  
Two Enable inputs, one active low (E1), and the other active  
high (E2) are provided allowing enabling with either input  
voltage level.  
- V  
- V  
- V = 4.5V. . . . . . . . . . . . . . . . . . . . . . 70Ω (Typ)  
EE  
- V = 9V . . . . . . . . . . . . . . . . . . . . . . . 40Ω (Typ)  
EE  
CC  
CC  
• Low Crosstalk Between Switches  
• Fast Switching and Propagation Speeds  
• “Break-Before-Make” Switching  
Ordering Information  
o
o
• Wide Operating Temperature Range . . . -55 C to 125 C  
TEMP. RANGE  
o
• HC Types  
PART NUMBER  
CD54HC4351F3A  
CD74HC4351E  
CD74HC4351M  
CD74HC4351M96  
CD74HCT4351E  
CD74HC4352E  
( C)  
PACKAGE  
20 Ld CERDIP  
20 Ld PDIP  
20 Ld SOIC  
20 Ld SOIC  
20 Ld PDIP  
20 Ld PDIP  
- 2V to 6V Operation, Control; 0V to 10V Switch  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
• HCT Types  
- 4.5V to 5.5V Operation, Control; 0V to 10V Switch  
- Direct LSTTL Input Logic Compatibility,  
V = 0.8V (Max), V = 2V (Min)  
IL  
IH  
- CMOS Input Compatibility, I ≤ 1µA at V , V  
OL OH  
l
Description  
NOTE: When ordering, use the entire part number. The suffix 96  
denotes tape and reel.  
The ’HC4351, CD74HCT4351, and CD74HC4352 are  
digitally controlled analog switches which utilize silicon-gate  
Pinouts  
CD54HC4351  
(CERDIP)  
CD74HC4351  
(PDIP, SOIC)  
CD74HCT4351  
(PDIP)  
CD74HC4352  
(PDIP)  
TOP VIEW  
with  
Latch)  
/Autho  
r ()  
/Key-  
words  
(High  
Speed  
CMOS  
Logic  
1
2
3
4
5
6
7
8
9
V
B0  
20  
19  
CC  
B2  
A2  
TOP VIEW  
NC  
18 A1  
B COMMON  
17 A COMMON  
16 A0  
1
2
3
4
5
6
7
8
9
V
A4  
20  
19  
CC  
B3  
B1  
E1  
E2  
A6  
A2  
15 A3  
NC  
18 A1  
17 A0  
16 A3  
15 S0  
14 NC  
13 S1  
14 NC  
A COMMON  
13 S0  
A7  
A5  
E1  
E2  
12  
V
S1  
EE  
GND 10  
11 LE  
12  
V
S2  
EE  
GND 10  
11 LE  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1
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