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CD74HC4017QPWRQ1

更新时间： 2024-11-23 12:42:59
品牌 Logo 应用领域
德州仪器 - TI 计数器触发器逻辑集成电路光电二极管输出元件
页数 文件大小 规格书
14页 320K
描述
HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER WITH 10 DECODED OUTPUTS

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CD74HC4017QPWRQ1 数据手册

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CD74HC4017-Q1  
HIGH-SPEED CMOS LOGIC DECADE COUNTER/DIVIDER  
WITH 10 DECODED OUTPUTS  
SCLS546SA − OCTOBER 2003 − REVISED APRIL 2008  
D
D
D
D
D
D
Qualified for Automotive Applications  
Fully Static Operation  
Buffered Inputs  
D
Significant Power Reduction Compared to  
LSTTL Logic ICs  
D
V
CC  
Voltage = 2 V to 6 V  
D
High Noise Immunity N or N = 30% of  
IL  
IH  
Common Reset  
V
CC  
, V = 5 V  
CC  
Positive Edge Clocking  
Typical f  
= 60 MHz at V = 5 V,  
CC  
M OR PW PACKAGE  
(TOP VIEW)  
MAX  
C = 15 pF, T = 25°C  
L
A
D
Fanout (Over Temperature Range)  
− Standard Outputs . . . 10 LSTTL Loads  
− Bus Driver Outputs . . . 15 LSTTL Loads  
5
1
0
2
6
7
3
VCC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
MR  
CP  
CE  
TC  
9
D
Balanced Propagation Delay and Transition  
Times  
description/ordering information  
4
8
GND  
The CD74HC4017 is a high-speed silicon-gate  
CMOS 5-stage Johnson counter with ten decoded  
outputs. Each of the decoded outputs normally is low  
and sequentially goes high on the low-to-high transition clock period of the ten-clock-period cycle. The carry  
(TC) output transitions low to high after output 9 goes from high to low, and can be used in conjunction with the  
clock enable (CE) input to cascade several stages. CE disables counting when in the high state. A master reset  
(MR) input also is provided that, when taken high, sets all the decoded outputs, except output 0, to low.  
The device can drive up to ten low-power Schottky equivalent loads.  
{
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
T
A
PACKAGE  
SOIC − M  
Tape and reel  
CD74HC4017QM96Q1  
HC4017Q  
−40°C to 125°C  
TSSOP − PW Tape and reel  
CD74HC4017QPWRQ1 HC4017Q  
†
‡
For the most current package and ordering information, see the Package Option Addendum at the  
end of this document, or see the TI web site at http://www.ti.com.  
Package drawings, thermal data, and symbolization are available at http://www.ti.com/packaging.  
FUNCTION TABLE  
INPUTS  
†
OUTPUT STATE  
CP  
L
CE  
X
MR  
L
No change  
No change  
X
H
X
L
X
H
L
0 = H, 1−9 = L  
Increments counter  
No change  
↑
L
↓
X
L
X
↑
L
No change  
H
↓
L
Increments counter  
NOTE: H = high voltage level, L = low voltage level,  
X = don’t care, ↑ = transition from low to high  
level, ↓ = transition from high to low level  
†
If n < 5, TC = H, otherwise TC = L  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2008, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...14

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CD74HC4017QPWRQ1 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4017PWR TI

完全替代

 High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
CD74HC4017PW TI

完全替代

 High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
CD74HC4017E TI

完全替代

 High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

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