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CD74HC4017E PDF预览

CD74HC4017E

更新时间: 2024-11-18 21:54:35
品牌 Logo 应用领域
德州仪器 - TI 计数器
页数 文件大小 规格书
14页 353K
描述
High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

CD74HC4017E 技术参数

是否Rohs认证: 符合生命周期:Active
零件包装代码:DIP包装说明:DIP-16
针数:16Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
Factory Lead Time:6 weeks风险等级:1.1
Is Samacsys:N其他特性:JOHNSON COUNTER WITH 10 DECODED OUTPUTS; GATED CLOCK
计数方向:UP系列:HC/UH
JESD-30 代码:R-PDIP-T16JESD-609代码:e4
长度:19.3 mm负载电容(CL):50 pF
负载/预设输入:NO逻辑集成电路类型:RING COUNTER
最大频率@ Nom-Sup:20000000 Hz最大I(ol):0.0052 A
工作模式:SYNCHRONOUS位数:10
功能数量:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE包装方法:TUBE
峰值回流温度(摄氏度):NOT SPECIFIED电源:2/6 V
最大电源电流(ICC):0.08 mAProp。Delay @ Nom-Sup:54 ns
传播延迟(tpd):345 ns认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Counters
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):4.5 V表面贴装:NO
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED触发器类型:POSITIVE EDGE
宽度:6.35 mm最小 fmax:23 MHz
Base Number Matches:1

CD74HC4017E 数据手册

 浏览型号CD74HC4017E的Datasheet PDF文件第2页浏览型号CD74HC4017E的Datasheet PDF文件第3页浏览型号CD74HC4017E的Datasheet PDF文件第4页浏览型号CD74HC4017E的Datasheet PDF文件第5页浏览型号CD74HC4017E的Datasheet PDF文件第6页浏览型号CD74HC4017E的Datasheet PDF文件第7页 
CD54HC4017, CD74HC4017  
Data sheet acquired from Harris Semiconductor  
SCHS200D  
High-Speed CMOS Logic  
Decade Counter/Divider with 10 Decoded Outputs  
November 1997 - Revised October 2003  
Features  
Description  
The ’HC4017 is a high speed silicon gate CMOS 5-stage  
Johnson counter with 10 decoded outputs. Each of the  
decoded outputs is normally low and sequentially goes high  
on the low to high transition clock period of the 10 clock  
period cycle. The CARRY (TC) output transitions low to high  
after OUTPUT 10 goes from high to low, and can be used in  
conjunction with the CLOCK ENABLE (CE) to cascade  
several stages. The CLOCK ENABLE input disables  
counting when in the high state. A RESET (MR) input is also  
• Fully Static Operation  
• Buffered Inputs  
• Common Reset  
• Positive Edge Clocking  
[ /Title  
(CD74  
HC401  
7)  
/Sub-  
ject  
(High  
Speed  
CMOS  
Logic  
Decade  
Counte  
o
• Typical f  
MAX  
= 50MHz at V = 5V, C = 15pF, T = 25 C  
CC L A  
• Fanout (Over Temperature Range)  
- Standard Outputs. . . . . . . . . . . . . . . 10 LSTTL Loads provided which when taken high sets all the decoded  
outputs, except “0”, low.  
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads  
o
o
The device can drive up to 10 low power Schottky equivalent  
loads.  
• Wide Operating Temperature Range . . . -55 C to 125 C  
• Balanced Propagation Delay and Transition Times  
Ordering Information  
• Significant Power Reduction Compared to LSTTL  
Logic ICs  
TEMP. RANGE  
o
• HC Types  
PART NUMBER  
CD54HC4017F3A  
CD74HC4017E  
( C)  
PACKAGE  
16 Ld CERDIP  
16 Ld PDIP  
- 2V to 6V Operation  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
- High Noise Immunity: N = 30%, N = 30% of V  
IL IH CC  
at V  
= 5V  
CC  
CD74HC4017M  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOIC  
16 Ld SOP  
CD74HC4017MT  
CD74HC4017M96  
CD74HC4017NSR  
CD74HC4017PW  
CD74HC4017PWR  
16 Ld TSSOP  
16 Ld TSSOP  
NOTE: When ordering, use the entire part number. The suffixes 96  
and R denote tape and reel. The suffix T denotes a small-quantity  
reel of 250.  
Pinout  
CD54HC4017 (CERDIP)  
CD74HC4017 (PDIP, SOIC, SOP, TSSOP)  
TOP VIEW  
5
1
2
3
4
5
6
7
8
16 V  
CC  
1
15 MR  
14 CP  
13 CE  
12 TC  
11 9  
0
2
6
7
10 4  
3
9
8
GND  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
Copyright © 2003, Texas Instruments Incorporated  
1

CD74HC4017E 替代型号

型号 品牌 替代类型 描述 数据表
CD74HC4017PWR TI

完全替代

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
CD74HC4017PW TI

完全替代

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs
CD74HC4017MT TI

完全替代

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

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