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CD74ACT280M96G4 PDF预览

CD74ACT280M96G4

更新时间: 2024-12-01 05:18:07
品牌 Logo 应用领域
德州仪器 - TI 运算电路逻辑集成电路光电二极管
页数 文件大小 规格书
12页 405K
描述
9-Bit Odd/Even Parity Generator/Checker

CD74ACT280M96G4 技术参数

是否无铅:不含铅是否Rohs认证:符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, MS-012AB, SOIC-14针数:14
Reach Compliance Code:unknownHTS代码:8542.39.00.01
风险等级:5.21Is Samacsys:N
其他特性:ODD/EVEN PARITY GENERATOR系列:ACT
JESD-30 代码:R-PDSO-G14JESD-609代码:e4
长度:8.65 mm逻辑集成电路类型:PARITY GENERATOR/CHECKER
湿度敏感等级:1位数:9
功能数量:1端子数量:14
最高工作温度:125 °C最低工作温度:-55 °C
输出极性:COMPLEMENTARY封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP14,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:5 V
传播延迟(tpd):21.6 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Arithmetic Circuits
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

CD74ACT280M96G4 数据手册

 浏览型号CD74ACT280M96G4的Datasheet PDF文件第2页浏览型号CD74ACT280M96G4的Datasheet PDF文件第3页浏览型号CD74ACT280M96G4的Datasheet PDF文件第4页浏览型号CD74ACT280M96G4的Datasheet PDF文件第5页浏览型号CD74ACT280M96G4的Datasheet PDF文件第6页浏览型号CD74ACT280M96G4的Datasheet PDF文件第7页 
CD54/74AC280,  
CD54/74ACT280  
Data sheet acquired from Harris Semiconductor  
SCHS250A  
August 1998 - Revised May 2000  
9-Bit Odd/Even Parity Generator/Checker  
data inputs is HIGH. Odd parity is indicated (O output is  
HIGH) when an odd number of data inputs is HIGH. Parity  
checking for words larger than nine bits can be accom-  
plished by tying the E output to any input of an additional  
’AC280, ’ACT280 parity checker.  
Features  
• Buffered Inputs  
• Typical Propagation Delay  
o
- 10ns at V  
= 5V, T = 25 C, C = 50pF  
A L  
CC  
• Exceeds 2kV ESD Protection per MIL-STD-883,  
Method 3015  
Ordering Information  
PART  
NUMBER  
TEMP.  
RANGE ( C)  
• SCR-Latchup-Resistant CMOS Process and Circuit  
Design  
o
PACKAGE  
14 Ld CERDIP  
14 Ld PDIP  
CD54AC280F3A  
CD74AC280E  
-55 to 125  
• Speed of Bipolar FAST™/AS/S with Significantly  
Reduced Power Consumption  
o
0 to 70 C, -40 to 85,  
-55 to 125  
• Balanced Propagation Delays  
o
CD74AC280M  
0 to 70 C, -40 to 85,  
14 Ld SOIC  
• AC Types Feature 1.5V to 5.5V Operation and  
Balanced Noise Immunity at 30% of the Supply  
-55 to 125  
CD54ACT280F3A  
CD74ACT280E  
-55 to 125  
14 Ld CERDIP  
14 Ld PDIP  
o
±24mA Output Drive Current  
- Fanout to 15 FAST™ ICs  
0 to 70 C, -40 to 85,  
-55 to 125  
o
- Drives 50Transmission Lines  
CD74ACT280M  
NOTES:  
0 to 70 C, -40 to 85,  
14 Ld SOIC  
-55 to 125  
Description  
1. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
The ’AC280 and ’ACT280 are 9-bit odd/even parity genera-  
tor/checkers that utilize Advanced CMOS Logic technology.  
Both even and odd parity outputs are available for checking  
or generating parity for words up to nine bits long. Even par-  
ity is indicated (E output is HIGH) when an even number of  
2. Wafer and die for this part number is available which meets all elec-  
trical specifications. Please contact your local TI sales office or cus-  
tomer service for ordering information.  
Pinout  
Functional Diagram  
CD54AC280, CD54ACT280  
(CERDIP)  
CD74AC280, CD74ACT280  
(PDIP, SOIC)  
8
I0  
TOP VIEW  
9
I1  
10  
I2  
I3  
5
6
I6  
I7  
1
2
3
4
5
6
7
14 V  
CC  
EVEN  
ODD  
11  
12  
13  
1
13 I5  
12 I4  
11 I3  
10 I2  
NC  
I8  
I4  
I5  
I6  
E  
O  
GND  
9
8
I1  
I0  
2
4
I7  
I8  
GND = 7  
= 14  
V
CC  
NC = 3  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a Trademark of Fairchild Semiconductor.  
1
Copyright © 2000, Texas Instruments Incorporated  

CD74ACT280M96G4 替代型号

型号 品牌 替代类型 描述 数据表
CD74ACT280M96E4 TI

完全替代

9-Bit Odd/Even Parity Generator/Checker
CD74ACT280EE4 TI

完全替代

9-Bit Odd/Even Parity Generator/Checker
CD74ACT280ME4 TI

完全替代

9-Bit Odd/Even Parity Generator/Checker

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