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CD74AC175

更新时间： 2024-11-23 22:38:55
品牌 Logo 应用领域
德州仪器 - TI 触发器
页数 文件大小 规格书
7页 37K
描述
Quad D Flip-Flop with Reset

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CD74AC175 数据手册

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CD74AC175,  
CD74ACT175  
Data sheet acquired from Harris Semiconductor  
SCHS242  
September 1998  
Quad D Flip-Flop with Reset  
Features  
Description  
[ /Title  
(CD74  
AC175  
,
CD74  
ACT17  
5
• Buffered Inputs  
The CD74AC175 and CD74ACT175 are quad D flip-flops  
with reset that utilize the Harris Advanced CMOS Logic tech-  
nology. Information at the D input is transferred to the Q and  
Q outputs on the positive-going edge of the clock pulse. All  
four flip-flops are controlled by a common clock (CP) and a  
common reset (MR). Resetting is accomplished by a LOW  
logic level independent of the clock.  
• Typical Propagation Delay  
o
- 6.4ns at V  
= 5V, T = 25 C, C = 50pF  
A L  
CC  
• Exceeds 2kV ESD Protection MIL-STD-883, Method  
3015  
• SCR-Latchup-Resistant CMOS Process and Circuit  
Design  
)
Ordering Information  
/Sub-  
ject  
(Quad  
D Flip-  
Flop  
• Speed of Bipolar FAST™/AS/S with Significantly  
Reduced Power Consumption  
PART  
NUMBER  
TEMP.  
PKG.  
NO.  
o
RANGE ( C)  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
PACKAGE  
16 Ld PDIP  
16 Ld PDIP  
16 Ld SOIC  
16 Ld SOIC  
• Balanced Propagation Delays  
CD74AC175E  
CD74ACT175E  
CD74AC175M  
CD74ACT175M  
NOTES:  
E16.3  
• AC Types Feature 1.5V to 5.5V Operation and  
Balanced Noise Immunity at 30% of the Supply  
E16.3  
M16.15  
M16.15  
with  
• ±24mA Output Drive Current  
- Fanout to 15 FAST™ ICs  
Reset)  
/Autho  
r ()  
/Key-  
words  
(Har-  
ris  
- Drives 50Ω Transmission Lines  
13. When ordering, use the entire part number. Add the suffix 96 to  
obtain the variant in the tape and reel.  
14. Wafer and die for this part number is available which meets all elec-  
trical specifications. Please contact your local sales office or Harris  
customer service for ordering information.  
Semi-  
con-  
Pinout  
CD74AC175, CD74ACT175  
(PDIP, SOIC)  
TOP VIEW  
ductor,  
Advan  
ced  
CMOS  
,Harris  
Semi-  
con-  
ductor,  
Advan  
ced  
MR  
Q0  
1
2
3
4
5
6
7
8
16 V  
CC  
15 Q3  
14 Q3  
13 D3  
12 D2  
11 Q2  
10 Q2  
Q0  
D0  
D1  
Q1  
Q1  
9
CP  
GND  
TTL)  
/Cre-  
ator ()  
/DOCI  
NFO  
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.  
FAST™ is a Trademark of Fairchild Semiconductor.  
Copyright © Harris Corporation 1998  
File Number 1964.1  
1
1234567

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