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CD74AC161 PDF预览

CD74AC161

更新时间: 2024-01-23 14:22:40
品牌 Logo 应用领域
德州仪器 - TI 计数器
页数 文件大小 规格书
11页 156K
描述
4-BIT SYNCHRONOUS BINARY COUNTERS

CD74AC161 技术参数

生命周期:Obsolete包装说明:,
Reach Compliance Code:unknown风险等级:5.65
其他特性:TCO OUTPUT计数方向:UP
系列:ACJESD-30 代码:R-PDSO-G16
负载电容(CL):50 pF负载/预设输入:YES
逻辑集成电路类型:BINARY COUNTER工作模式:SYNCHRONOUS
位数:4功能数量:1
端子数量:16最高工作温度:125 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
传播延迟(tpd):16.5 ns认证状态:Not Qualified
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):1.5 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:GULL WING端子位置:DUAL
触发器类型:POSITIVE EDGE最小 fmax:90 MHz
Base Number Matches:1

CD74AC161 数据手册

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CD54AC161, CD74AC161  
4-BIT SYNCHRONOUS BINARY COUNTERS  
SCHS239A – SEPTEMBER 1998 – REVISED APRIL 2000  
CD54AC161 . . . F PACKAGE  
CD74AC161 . . . E OR M PACKAGE  
(TOP VIEW)  
Internal Look-Ahead for Fast Counting  
Carry Output for n-Bit Cascading  
Synchronous Counting  
CLR  
CLK  
A
V
CC  
RCO  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
Synchronously Programmable  
SCR-Latchup-Resistant CMOS Process and  
Circuit Design  
Q
A
B
Q
B
Exceeds 2 kV ESD Protection per  
MIL-STD-883, Method 3015  
C
Q
C
D
Q
D
ENP  
GND  
ENT  
LOAD  
Package Options Include Plastic  
Small-Outline (M), Standard Plastic (E) and  
Ceramic (F) DIPs  
description  
The CD54AC161 and CD74AC161 devices are 4-bit binary counters. These synchronous, presettable counters  
feature an internal carry look-ahead for application in high-speed counting designs. Synchronous operation is  
provided by having all flip-flops clocked simultaneously so that the outputs change coincident with each other  
when so instructed by the count-enable (ENP, ENT) inputs and internal gating. This mode of operation  
eliminates the output counting spikes that normally are associated with synchronous (ripple-clock) counters.  
A buffered clock (CLK) input triggers the four flip-flops on the rising (positive-going) edge of the clock waveform.  
These devices are fully programmable; that is, they can be preset to any number between 0 and 9 or 15.  
Presetting is synchronous; therefore, setting up a low level at the load input disables the counter and causes  
the outputs to agree with the setup data after the next clock pulse, regardless of the levels of the enable inputs.  
The clear function is asynchronous. A low level at the clear (CLR) input sets all four of the flip-flop outputs low,  
regardless of the levels of the CLK, load (LOAD), or enable inputs.  
The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without  
additional gating. Instrumental in accomplishing this function are ENP, ENT, and a ripple-carry output (RCO).  
Both ENP and ENT must be high to count, and ENT is fed forward to enable RCO. Enabling RCO produces a  
high-level pulse while the count is maximum (9 or 15 with Q high). This high-level overflow ripple-carry pulse  
A
can be used to enable successive cascaded stages. Transitions at ENP or ENT are allowed, regardless of the  
level of CLK.  
The counters feature a fully independent clock circuit. Changes at control inputs (ENP, ENT, or LOAD) that  
modify the operating mode have no effect on the contents of the counter until clocking occurs. The function of  
the counter (whether enabled, disabled, loading, or counting) is dictated solely by the conditions meeting the  
stable setup and hold times.  
The CD54AC161 is characterized for operation over the full military temperature range of –55°C to 125°C.  
The CD74AC161 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2000, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

CD74AC161 替代型号

型号 品牌 替代类型 描述 数据表
CD54AC161 TI

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